Polysilicon Layer Grain Size Control for Surface Uniformity
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Solution Overview
Problem
The challenge in semiconductor device manufacturing is forming a uniform polysilicon layer with reduced surface roughness and improved sheet resistance uniformity, as existing methods often result in non-flat polysilicon surfaces affecting device performance.
Innovation Solution
A method involving the formation of a first amorphous polysilicon layer with smaller grain size followed by a crystallized polysilicon layer, using a silicon-containing gas and an inhibitive gas like hydrogen, where the inhibitive gas controls the decomposition rate and temperature conditions are optimized to achieve a flatter topography.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a single polysilicon layer is formed by CVD process, then the polysilicon layer can be deposited efficiently, but the surface roughness increases and surface uniformity deteriorates
Solution Approach 1:
The polysilicon layer is divided into two distinct layers: a first polysilicon layer with smaller grain size formed by introducing an inhibitive gas, and a second polysilicon layer with larger grain size formed by standard CVD process. This segmentation allows each layer to serve different functions - the first layer provides a uniform base with reduced surface roughness, while the second layer provides the final polysilicon structure, thereby resolving the contradiction between deposition efficiency and surface uniformity.
Solution Approach 2:
Different regions of the polysilicon structure are given different properties through the two-layer approach. The first polysilicon layer has smaller grain size and serves as a foundation layer with improved surface uniformity, while the second layer has larger grain size for optimal electrical properties. This local differentiation of material properties allows simultaneous achievement of surface uniformity and deposition efficiency.
2Productivity
If the decomposition rate of silicon-containing gas is increased to improve deposition speed, then productivity increases, but surface roughness increases and surface uniformity worsens
Solution Approach 1:
The deposition process is segmented into two stages with different decomposition rates. The first stage uses an inhibitive gas to reduce the decomposition rate, producing a layer with fine grain structure and smooth surface. The second stage increases the decomposition rate for faster deposition of the remaining thickness. This temporal segmentation of deposition conditions resolves the contradiction between deposition speed and surface roughness.
Solution Approach 2:
The first polysilicon layer with reduced decomposition rate is formed as a preliminary step before the main deposition. This preliminary layer acts as a foundation that reduces surface roughness, preparing the surface for subsequent faster deposition. By performing the surface-smoothing action first, the contradiction between speed and quality is resolved.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances surface uniformity and reduces sheet resistance variability within a wafer, leading to improved device performance by creating a two-layer polysilicon structure with smaller and larger grain sizes, respectively.
Implementation Method 1
a first polysilicon layer is formed by introducing a silicon-containing gas and an inhibitive gas, and the inhibitive gas is for inhibiting a decomposition rate of the silicon-containing gas
Implementation Method 2
a first polysilicon layer is formed by introducing a silicon-containing gas... a second polysilicon layer is formed by introducing the silicon-containing gas
Implementation Method 3
the first polysilicon layer is amorphous while the second polysilicon layer is crystallized
Data Source
AI summary
The method of forming a polysilicon layer is provided. A first polysilicon layer with a first grain size is formed on a substrate. A second polysilicon layer with a second grain size is formed on the first polysilicon layer. The first grain size is smaller than the second grain size. The first polysilicon layer with a smaller grain size can serve as a base for the following deposition, so that the second polysilicon layer formed thereon has a flatter topography, and thus, the surface roughness is reduced and the Rs uniformity within a wafer is improved.