Polysilicon Guard Ring Structure for Power Semiconductor Leakage Reduction
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Solution Overview
Problem
Existing power semiconductor devices require a large number of mask levels in their processing technology, leading to complex fabrication processes and inefficiencies in junction termination structures, which can result in leakage current and low breakdown voltage, especially at corner edges.
Innovation Solution
A power semiconductor device with a polysilicon layer that includes both an active device portion and a junction termination portion, where the junction termination portion defines a ring structure, and a method of forming the device using a reduced number of masks, specifically six masks, to simplify the fabrication process and improve device performance by reducing lateral spacing between termination rings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a series of seven masks are used to generate power semiconductor devices having ring termination structures, then acceptable device performance is achieved, but the fabrication process complexity increases due to the large number of mask levels
Solution Approach 1:
The patent combines the functions of multiple masks into a single polysilicon mask structure. The polysilicon layer is patterned to simultaneously define the ring termination structures and serve as a mask for subsequent implantation steps, eliminating the need for separate ring mask, poly mask, P+ implant mask, and N+ implant mask that were traditionally required.
Solution Approach 2:
The polysilicon layer serves multiple functions: it defines the ring termination structures, acts as a mask for P+ and N+ implantation, and provides structural support. This multi-functional approach replaces several specialized masks with a single versatile polysilicon structure, simplifying the fabrication process while maintaining device performance.
2Ease of manufacture
If simple junction termination is used, then fabrication is simplified, but breakdown voltage decreases due to high electric field at junction edge
Solution Approach 1:
The patent applies different doping concentrations and structures at different locations within the junction termination region. Specifically, P+ and N+ doped regions are created in alternating segments around the ring structure, creating localized variations in electric field distribution that reduce peak fields at critical edges while maintaining overall structural simplicity.
Solution Approach 2:
The patent modifies the electrical parameters of the junction termination by introducing alternating P+ and N+ doped regions with specific doping concentrations. This changes the electric field distribution and potential profiles at the junction edges, thereby increasing breakdown voltage without significantly complicating the fabrication process.
3Reliability
If guard ring structures are used to reduce leakage current, then device reliability improves, but fabrication complexity increases due to additional mask requirements
Solution Approach 1:
The guard ring structures are integrated into the polysilicon mask layer itself, combining the guard ring formation with the mask function. The polysilicon pattern directly creates the ring structures that serve as guard rings, eliminating the need for a separate ring mask while maintaining the leakage reduction functionality.
Solution Approach 2:
The polysilicon layer serves itself by acting as both the structural element (ring termination) and the masking element for implantation. This self-service approach eliminates the need for additional dedicated mask layers, reducing fabrication complexity while maintaining the guard ring functionality for leakage current reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The simplified fabrication process results in improved device performance with reduced leakage current and comparable breakdown voltage to existing devices, while reducing the complexity of mask levels from seven to six, enhancing the efficiency of junction termination.
Implementation Method 1
implanting a P− dopant to form well regions in the semiconductor substrate
Data Source
AI summary
In one embodiment, a power semiconductor device may include a semiconductor substrate, wherein the semiconductor substrate comprises an active device region and a junction termination region. The power semiconductor device may also include a polysilicon layer, disposed over the semiconductor substrate. The polysilicon layer may include an active device portion, disposed over the active device region, and defining at least one semiconductor device; and a junction termination portion, disposed over the junction termination region, the junction termination portion defining a ring structure.