Polysilicon p-n Junction Layout for Larger Diode Area
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Solution Overview
Problem
Conventional semiconductor devices face challenges in increasing the junction area of temperature sensing diodes without reducing the effective region or prolonging impurity diffusion time, particularly in structures where the p-n junction boundary extends vertically without slope.
Innovation Solution
A semiconductor device with a polysilicon element formed on a substrate, featuring a first region of one conductivity type, a second region of another conductivity type, and a third region with lower impurity concentration between them, where the width of the first region varies from the second main surface to the first main surface, effectively increasing the junction area without vertical slope.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the area of the temperature sensing diode is increased in a plan view to increase the junction area of the p-n junction, then the forward voltage is reduced, but the effective region such as an energization region of the semiconductor device decreases
Solution Approach 1:
The patent transitions from increasing junction area in the plan view (2D expansion) to increasing junction area through vertical thickness (3D expansion). The impurity regions are thickened in the thickness direction of the semiconductor substrate, creating a vertically extended p-n junction that increases junction area without consuming additional planar space, thus resolving the contradiction between junction area and effective region.
Solution Approach 2:
The patent introduces sloped boundaries to the impurity regions, replacing the conventional vertical (straight) boundaries. The slope creates a tapered or angled geometry that increases the junction area by extending the p-n interface obliquely through the substrate thickness, effectively utilizing three-dimensional space to increase junction area without planar expansion.
2Quantity of substance
If the impurity regions are thickened in a cross-sectional view to increase the junction area of the p-n junction, then the forward voltage is reduced, but the time for diffusing impurities is prolonged
Solution Approach 1:
The sloped configuration of impurity regions allows impurities to be distributed along an inclined path rather than requiring deep vertical diffusion. The slope angle optimizes the diffusion path length, reducing the effective diffusion distance compared to a purely vertical thickening approach, thereby decreasing diffusion time while still achieving increased junction area.
Solution Approach 2:
The patent changes the geometric parameters of impurity regions by introducing slope angles and varying thickness profiles. This parameter optimization allows the impurity diffusion process to be more efficient, as the sloped geometry reduces the maximum diffusion depth required compared to vertical thickening, thus reducing diffusion time while maintaining increased junction area.
3Ease of manufacture
If a vertical p-n junction boundary without slope is used, then the manufacturing process is simple, but the junction area cannot be increased without reducing effective region or prolonging diffusion time
Solution Approach 1:
The introduction of sloped boundaries replaces the simple vertical geometry with an angled configuration. This geometric modification can be achieved through standard semiconductor fabrication techniques such as angled ion implantation or sloped epitaxial growth, maintaining manufacturing feasibility while significantly increasing junction area through three-dimensional spatial utilization.
Solution Approach 2:
The patent moves from two-dimensional planar junction expansion to three-dimensional vertical/thickness direction expansion. This dimensional transition allows junction area increase through substrate thickness utilization rather than planar area consumption, maintaining manufacturing simplicity by using existing fabrication capabilities extended to 3D geometry control.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces the forward voltage of temperature sensing diodes and increases the breakdown voltage of Zener diodes, while maintaining the effective region and avoiding prolonged impurity diffusion times.
Implementation Method 1
a third region of the second conductivity type between the first region and the second region, the third region being lower in impurity concentration than the second region
Data Source
AI summary
An object is to provide a technology for enabling an appropriate increase in a junction area of a p-n junction. A semiconductor device includes: a semiconductor substrate having a first main surface and a second main surface; and a polysilicon element formed on the first main surface through a first insulating film. The polysilicon element includes: a first region of a first conductivity type and a second region of a second conductivity type, the first region and the second region being formed on the first insulating film; and a third region of the second conductivity type between the first region and the second region, the third region being lower in impurity concentration than the second region. A width of the first region in a cross-sectional view varies in a direction from the second main surface to the first main surface.