Polysilicon Oscillating MIM Capacitor Structure for Higher Capacitance Density
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge in semiconductor manufacturing is the limited capacitance per area of metal insulator metal (MIM) capacitors due to material diffusion and size constraints, which affects the design efficiency and space utilization in integrated circuits.
Innovation Solution
A semiconductor fabrication process that involves depositing an oxide layer, a polysilicon layer, and metal layers with an oscillating wave structure, using advanced lithography techniques to increase the frequency and pitch of trenches, and rounding corners to enhance capacitance per area while managing semiconductor processing yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If MIM capacitor size is increased to provide necessary capacitance per area, then capacitance density is improved, but area consumed by the capacitor increases
Solution Approach 1:
The patent introduces an oscillating wave structure that adds vertical and lateral dimensionality to the capacitor plates. By creating sinusoidal or triangular wave patterns in the metal layers, the effective surface area of the plates is dramatically increased without proportionally increasing the footprint area, thereby improving capacitance per area while controlling space consumption.
Solution Approach 2:
The patent employs curved oscillating wave patterns (sinusoidal, triangular, or trapezoidal shapes) instead of flat parallel plates. This curvature increases the effective plate surface area within the same footprint, enhancing capacitance density while maintaining compact form factor.
2Quantity of substance
If dielectric layer size is increased to achieve necessary capacitance, then capacitance per area is improved, but manufacturing complexity and etch stop problems increase
Solution Approach 1:
The oscillating wave structure creates a three-dimensional capacitor architecture where the dielectric layer follows the undulating metal plate surfaces. This vertical dimensionality allows increased capacitance without requiring larger lateral dielectric dimensions, reducing etch stop problems and manufacturing complexity associated with large planar dielectric layers.
3Ease of manufacture
If conventional MIM capacitor structure is used, then manufacturing process is simpler, but capacitance per area is limited due to material diffusion
Solution Approach 1:
The patent employs a composite structure combining oscillating wave metal layers with dielectric material filling the spaces. This composite architecture increases effective plate area while maintaining manufacturing feasibility through standard deposition and etching processes adapted for the wave pattern geometry.
Data Source
Figure 1~2
Figure 3~4
Figure 5~6
AI summary
A system and method for fabricating metal insulator metal capacitors while managing semiconductor processing yield and increasing capacitance per area are described. A semiconductor device fabrication process places a polysilicon layer on top of an oxide layer which is on top of a metal layer. The process etches trenches into areas of the polysilicon layer where the repeated trenches determine a frequency of an oscillating wave structure to be formed later. The top and bottom corners of the trenches are rounded. The process deposits a bottom metal, a dielectric, and a top metal on the polysilicon layer both on areas with the trenches and on areas without the trenches. A series of a barrier metal and a second polysilicon layer is deposited on the oscillating structure. The process completes the MIM capacitor with metal nodes contacting each of the top metal and the bottom metal of the oscillating structure.