Polycrystalline Silicon Electro-Optic Modulators for CMOS Integration
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Solution Overview
Problem
The integration of optics with microprocessor chips is hindered by the reliance on single-crystalline silicon-on-insulator (SOI) platforms, which occupy valuable real estate and have inappropriate buried oxide thickness for waveguide cladding, limiting the large-scale integration of optical devices.
Innovation Solution
The use of polycrystalline silicon as a deposited microelectronic material enables the monolithic integration of optics in a separate layer of a microprocessor chip, with electro-optic devices like p+n−n+ diodes and ring resonators fabricated using standard CMOS processes, allowing for flexible optical system design and efficient carrier injection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If single-crystalline silicon-on-insulator (SOI) platform is used for optical devices, then device performance is improved, but real estate occupancy increases and integration density decreases
Solution Approach 1:
The patent divides the chip into separate functional layers: a first substrate layer for electronic circuits and a second substrate layer for optical devices. This segmentation allows optical devices to be fabricated on a separate layer, reducing their occupancy on the valuable transistor layer while maintaining device performance through dedicated optimization of each layer's material properties and device structures.
2Ease of manufacture
If standard microelectronic SOI is used, then manufacturing compatibility is improved, but buried oxide thickness is insufficient for waveguide cladding
Solution Approach 1:
The patent changes the thickness parameter of the buried oxide layer from the standard thin SOI configuration to a thick buried oxide configuration where the oxide layer thickness exceeds the optical wavelength. This parameter change enables the buried oxide to function as effective waveguide cladding while maintaining compatibility with standard microelectronic fabrication processes through adapted process parameters.
3Productivity
If polycrystalline silicon is used instead of single-crystalline silicon, then integration density is improved, but material quality for optical resonators deteriorates
Solution Approach 1:
The patent transitions from two-dimensional planar integration to three-dimensional vertical integration by stacking optical and electronic devices on separate substrate layers. This dimensional change allows polycrystalline silicon to be used in the optical layer for high integration density while the electronic layer maintains its performance requirements, as each layer can be independently optimized and processed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables GHz-speed electro-optic modulation with reduced power consumption and increased integration density, overcoming the limitations of traditional SOI platforms by using polycrystalline silicon to achieve high-quality optical resonators and sub-nanosecond carrier injection.
Implementation Method 1
The diode is used to inject and extract charge from the resonator, which switches the light transmission on and off using the free carrier plasma dispersion effect.
Data Source
AI summary
Novel integrated electro-optic structures such as modulators and switches and methods for fabrication of the same are disclosed in a variety of embodiments. In an illustrative embodiment, a device includes a substrate with a waveguide and an optical resonator comprising polycrystalline silicon positioned on the substrate. First and second doped semiconducting regions also comprise polycrystalline silicon and are positioned proximate to the first optical resonator. The first optical resonator is communicatively coupled to the waveguide.