Polycrystalline Silicon Thin Film With Pin-Shaped Protrusions
Solution Overview
Problem
Current integrated circuit (IC) devices face challenges in achieving high integration density and improved electrical characteristics due to the complexity of memory device operations and reduced memory cell sizes, which leads to increased grain boundaries affecting carrier mobility.
Innovation Solution
The development of an IC device with a polycrystalline semiconductor thin film that minimizes grain boundaries by increasing particle size in the active region, using a pin-shaped protruding portion of silicon single crystals and an amorphous silicon seed, and an inter-device dielectric layer with pinholes to enhance carrier mobility and electrical characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory cell sizes are reduced for high integration, then integration density is improved, but grain boundaries increase affecting carrier mobility
Solution Approach 1:
The patent applies local quality by creating a pin-shaped protruding portion in the semiconductor single crystal that selectively positions grain boundaries. The grain boundaries are confined to specific regions (the protruding portion) rather than being distributed throughout the entire structure, allowing the active region to maintain high carrier mobility while still achieving high integration density through overall miniaturization.
Solution Approach 2:
The patent transitions from two-dimensional planar structures to three-dimensional vertical structures by creating pin-shaped protruding portions that extend vertically. This dimensional change allows memory cells to be stacked vertically, achieving high integration density without further reducing cell size in the plane, thereby avoiding increased grain boundaries.
2Reliability
If particle size of semiconductor crystals is increased to reduce grain boundaries, then carrier mobility is improved, but device area increases reducing integration density
Solution Approach 1:
The patent segments the semiconductor crystal structure into multiple regions: an active region with large particle size for high carrier mobility, and a pin-shaped protruding portion that contains grain boundaries. This segmentation allows the active region to maintain excellent electrical characteristics while the overall device area remains small for high integration density.
Solution Approach 2:
By extending the semiconductor crystal vertically to form pin-shaped protruding portions, the patent utilizes the vertical dimension to contain grain boundaries rather than requiring larger horizontal areas. This allows the active region to maintain large particle size for high carrier mobility while the device footprint remains small.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution results in improved carrier mobility and electrical characteristics by controlling crystal size and position, reducing grain boundaries, and enhancing integration density in IC devices.
Implementation Method 1
a polycrystalline semiconductor thin film which includes at least one silicon single crystal grown from an amorphous silicon seed
Data Source
AI summary
An IC device includes a polycrystalline silicon thin film interposed between a first level semiconductor circuit and a second level semiconductor circuit which are formed on a substrate and disposed to vertically overlap each other. The polycrystalline silicon thin film includes at least one silicon single crystal. The at least one silicon single crystal includes a flat horizontal portion, which provides an active region of the second level semiconductor device, and a pin-shaped protruding portion protruding from the flat horizontal portion toward the first level semiconductor device.