Polysilicon Resistor Integration with Metal Gate Transistors

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Solution Overview

Problem

The integration of manufacturing methods for semiconductor devices, particularly resistors and transistors with metal gates, is complex and prone to over etching issues, which complicates the fabrication process.

Innovation Solution

A method involving the formation of doped regions at opposite ends of a polysilicon main portion in the resistor region, which protects the polysilicon main portion during etching and allows for adjustable resistance by modifying the length of these doped regions, enabling the integration of a resistor with a transistor having a metal gate.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If an etching process is performed to remove the polysilicon dummy gate, then the transistor structure is formed, but the polysilicon main portion of the resistor is removed (over etching)

Engineering Contradiction:
Improveetching controlVSAvoidresistor structure integrity
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent introduces doped regions as intermediary protective structures between the etching process and the polysilicon main portion. These doped regions are positioned at both ends of the polysilicon main portion and serve as sacrificial elements that are removed during etching while protecting the main resistor structure from over-etching.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The doped regions are formed beforehand at the ends of the polysilicon main portion to act as cushioning protection during the subsequent etching process. This pre-positioned protection ensures that the etching process does not extend beyond the intended boundaries and damage the polysilicon main portion.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

2Ease of manufacture

If the integration method is simplified, then the fabrication process becomes easier, but the resistance value control becomes less precise

Engineering Contradiction:
Improveintegration process simplicityVSAvoidresistance value control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent enables resistance value control by changing the physical parameters of the doped regions, specifically their length. By adjusting the length of the doped regions, the resistance value can be precisely controlled while maintaining a simple and unified fabrication process that integrates both transistor and resistor formation.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively prevents over etching of the polysilicon main portion and simplifies the contact process, allowing for easy adjustment of resistance values by modifying the doped region length, thereby improving the integration of resistors and transistors with metal gates without increasing process complexity.

Implementation Method 1

performing an etching process to remove the polysilicon dummy gate to form a first trench and remove portions of the doped regions to form two second trenches

Methodology Applied
Scientific EffectEtching:

Implementation Method 2

forming a metal gate in the first trench to form a transistor having the metal gate

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 3

forming a polysilicon main portion with two doped regions positioned at two opposite ends in the resistor region

Methodology Applied
Scientific EffectDoping: Dopants

Data Source

PatentUS8981527B2Resistor and manufacturing method thereof
Publication Date: 2015.03.17 MARLIN SEMICON LTD
  • US8981527B2 patent drawing
  • US8981527B2 patent drawing
  • US8981527B2 patent drawing

AI summary

A method for forming a resistor integrated with a transistor having metal gate includes providing a substrate having a transistor region and a resistor region defined thereon, forming a transistor having a polysilicon dummy gate in the transistor region and a polysilicon main portion with two doped regions positioned at two opposite ends in the resistor region, performing an etching process to remove the polysilicon dummy gate to form a first trench and remove portions of the doped regions to form two second trenches, and forming a metal gate in the first trench to form a transistor having the metal gate and metal structures respectively in the second trenches to form a resistor.