Polysilicon Resistor Layout With Selective Silicide for Stable Resistance
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Solution Overview
Problem
Polysilicon resistors in semiconductor devices exhibit variability in resistance due to linewidth variations and header contributions, leading to yield loss and inconsistent performance across different devices on a wafer.
Innovation Solution
The introduction of dummy polysilicon segments adjacent to the outermost resistor segments and the exclusion of metal silicide from the interior portions of the resistor segments, reducing the impact of header resistance variability by forming metal silicide only on the headers and terminals, thereby dominating the resistance with the interior segments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal silicide is formed on all polysilicon structures including interior segments, then contact resistance is reduced, but resistance variability increases due to header contributions
Solution Approach 1:
The patent applies different treatments to different regions of the polysilicon resistor structure. Metal silicide is formed selectively only on headers and terminals, while interior segments remain unsilicided. This local differentiation allows headers to have low contact resistance while interior segments maintain consistent resistance values, resolving the contradiction between reducing contact resistance and minimizing resistance variability.
2Device complexity
If linewidth variations occur in polysilicon resistor segments, then manufacturing complexity increases, but resistance uniformity deteriorates
Solution Approach 1:
The patent extracts the silicide formation process from the interior segments of the polysilicon resistor, applying it only to headers and terminals. This extraction eliminates the harmful effect of silicide-induced resistance variability in the interior segments while preserving the beneficial low-contact-resistance property at connection points, thereby improving resistance uniformity without adding manufacturing complexity.
3Area of stationary object
If headers are included in the resistance measurement, then device area is reduced, but performance consistency worsens due to header resistance variability
Solution Approach 1:
By applying metal silicide selectively to headers while leaving interior segments unsilicided, the patent creates local quality differences that allow headers to contribute minimal resistance (due to silicide) while interior segments provide the dominant, consistent resistance value. This resolves the contradiction by making header resistance variability negligible compared to the controlled resistance of the interior segments.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces resistance variability across a manufacturing wafer, enhancing manufacturing yield and consistency by minimizing the contribution of headers to the overall resistance.
Implementation Method 1
A first metal silicide layer over the first header extends over the first and second segments toward the second header. A second metal silicide layer over the second header extends over the second and third segments toward the first header.
Data Source
AI summary
An integrated circuit includes a polysilicon resistor having a plurality of segments, including first, second and third segments, the second segment located between and running about parallel to the first and third segments. A first header connects the first and second segments, and a second header connects the second and third segments. A first metal silicide layer located over the first header extends over the first and second segments toward the second header. A second metal silicide layer located over the second header extends over the second and third segments toward the first header. A dielectric layer is located over and contacts the first, second and third segments between the first and second metal silicide layers.