Polysilicon Resistor Silicide Boundary Resistance Adjustment
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Solution Overview
Problem
The existing methods for manufacturing semiconductor devices with polysilicon resistors often result in increased development costs and prolonged development periods due to the need for multiple photomasks and design changes to correct resistance values, which can be high or low, affecting the surrounding patterns and wiring layout.
Innovation Solution
A semiconductor device with a polysilicon layer and silicide layers formed outside contact regions, where the number of silicide layers is adjusted to match the desired resistance value, allowing for correction without altering the polysilicon layer width or length, thus requiring only one photomask change in the silicide layer formation step.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If the resistance value is corrected by modifying photomasks for polysilicon formation and silicide layer formation, then the resistance value can be adjusted, but the development cost increases and the development period is prolonged
Solution Approach 1:
The invention segments the resistance value correction function into a dedicated resistance value correction layer (separate from the gate electrode pattern layer). This allows independent modification of the correction layer without changing the gate electrode photomask, thereby reducing development time and cost while maintaining manufacturing precision for resistance value adjustment
Solution Approach 2:
The invention performs preliminary action by forming the resistance value correction layer with predetermined patterns before the silicide layer formation step. This preliminary patterning enables resistance value correction to be achieved through simple photomask modification in the correction layer only, without requiring changes to previous process steps, thus shortening the development period
2Manufacturing precision
If the resistance value is corrected by modifying photomasks for polysilicon formation and silicide layer formation, then the resistance value can be adjusted, but the development cost increases
Solution Approach 1:
The invention segments the photomask modification requirement into only the resistance value correction layer, separating it from the gate electrode pattern layer. This segmentation reduces the number of photomasks that need modification, thereby lowering development cost while maintaining the ability to precisely adjust resistance values
Solution Approach 2:
Instead of modifying the gate electrode pattern to achieve resistance correction, the invention inverts the approach by introducing a separate correction layer that adds or removes resistance. This inversion allows the main gate electrode design to remain unchanged, reducing development cost
3Manufacturing precision
If the width of polysilicon layer is narrowed from both sides to increase resistance value, then the resistance value increases, but surrounding patterns and wiring layout are affected
Solution Approach 1:
The invention extracts the resistance value correction function from the gate electrode pattern and places it in a separate resistance value correction layer. This extraction allows resistance adjustment without modifying the gate electrode width, thereby maintaining adaptability of surrounding patterns and wiring layout while achieving precise resistance control
Solution Approach 2:
The invention applies local quality by adding silicide layers specifically in the resistance value correction region outside the gate electrode, rather than uniformly modifying the entire gate structure. This localized approach adjusts resistance values without affecting the dimensions or layout of surrounding patterns and wirings
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables efficient adjustment of resistance values by modifying the number of silicide layers, reducing development costs and time, while maintaining the integrity of surrounding patterns and wiring layouts, allowing for precise resistance value correction without affecting the resistor's shape.
Implementation Method 1
a silicide layer formed at least at one region other than the contact regions, being in contact with the polysilicon layer via a boundary surface having a predetermined resistance value
Data Source
AI summary
Provided is a semiconductor device having a resistor including silicide layers and a polysilicon layer with impurities, and the resistor includes a plurality of boundary surfaces between the silicide layers and the polysilicon layer in a longitudinal direction of the resistor, permitting correction with one photomask when a resistance value of a resistor is deviated from a design value while suppressing upsizing of a semiconductor device. Further, provided is a method of manufacturing the semiconductor device, in which the resistance value is adjusted by changing one mask for forming the silicide layers to change the number of boundary surfaces between the silicide layers and the polysilicon layer, and change a length of the polysilicon layer.