Polysilicon Schottky Diode Structure to Block Parasitic Currents

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Solution Overview

Problem

Conventional Schottky diodes suffer from parasitic currents and capacitances due to the formation of parasitic bipolar transistors, leading to increased risk of destruction and unwanted current injection into substrates, which existing technologies fail to adequately address.

Innovation Solution

A Schottky diode design featuring a polysilicon layer on a dielectric layer extending deep into the substrate, with N-type doped cathode and undoped anode regions, and metal contacts insulated by an oxide layer, eliminating the need for heavily P-type doped regions and preventing parasitic effects.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If heavily P-type doped regions are implanted between the anode and dielectric layer to smooth electric field lines, then breakdown voltage is improved, but parasitic bipolar transistor effects are generated causing unwanted currents and capacitances

Engineering Contradiction:
Improvebreakdown voltageVSAvoidparasitic currents
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent removes the heavily P-type doped regions that cause parasitic bipolar transistor effects while maintaining the dielectric layer structure. By extracting the problematic doped regions and replacing them with an undoped or lightly doped semiconductor layer, the solution eliminates parasitic currents while preserving breakdown voltage through the dielectric layer's electric field smoothing function.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the complex heavily doped region structure with a simpler undoped or lightly doped semiconductor layer. This substitution uses a more straightforward, less complex structure that achieves the same electric field smoothing function without generating parasitic effects, effectively trading a complex solution for a simpler one.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

2Stability of the object's composition

If heavily P-type doped regions are implanted to smooth electric field lines, then electric field distribution is improved, but parasitic capacitance is generated

Engineering Contradiction:
Improveelectric field distributionVSAvoidparasitic capacitance
Core Design Contradiction:
Stability of the object's compositionVSObject-generated harmful factors

Solution Approach 1:

The patent extracts the heavily P-type doped regions that create parasitic capacitance while retaining the dielectric layer structure. The undoped or lightly doped semiconductor layer maintains proper electric field distribution without introducing parasitic capacitance, as it avoids forming the parasitic bipolar transistor junctions that store unwanted charge.

Inventive Principle:
Principle #2Taking out (Extraction)

3Ease of manufacture

If conventional Schottky diode structure with heavily P-doped regions is used, then manufacturing process is established, but current leakage into substrate increases

Engineering Contradiction:
Improvemanufacturing processVSAvoidcurrent leakage
Core Design Contradiction:
Ease of manufactureVSObject-generated harmful factors

Solution Approach 1:

The patent removes the heavily P-doped regions that enable current leakage paths through the substrate. By replacing them with an undoped or lightly doped semiconductor layer, the solution eliminates the leakage mechanism while preserving the manufacturing process compatibility, as the change involves modifying doping parameters rather than fundamentally altering the fabrication sequence.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design reduces or eliminates parasitic currents and capacitances, enhancing breakdown voltage and preventing current leakage into the substrate, thereby improving the reliability and efficiency of the Schottky diode.

Implementation Method 1

a layer of polysilicon disposed on a dielectric layer extending deep into the substrate and adapted to electrically insulate the layer of polysilicon from the substrate

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Implementation Method 2

the layer of polysilicon having at least one N-type doped first region called the cathode region, adjacent to at least one undoped second region, called the anode region

Methodology Applied
Scientific EffectSchottky barrier: Diode

Implementation Method 3

a first metal contact disposed on the surface of said at least one first region and a second metal contact disposed on the surface of said at least one second region so that said first metal contact and said second metal contact are adapted to be electrically insulated from each other

Methodology Applied
Scientific EffectElectrical insulation: Dielectric

Data Source

PatentUS20240030357A1Method for manufacturing a schottky diode and corresponding integrated circuit
Publication Date: 2024.01.25 STMICROELECTRONICS (ROUSSET) SAS
  • US20240030357A1 patent drawing
  • US20240030357A1 patent drawing
  • US20240030357A1 patent drawing

AI summary

A semiconductor device includes a Schottky diode on a substrate. The Schottky diode includes a layer of polysilicon disposed on a dielectric layer within the substrate that is configured to electrically insulate the layer of polysilicon from the substrate. The layer of polysilicon includes an N-type doped first cathode region adjacent to an undoped second anode region. A first metal contact is disposed on a surface of the N-type doped first cathode region and a second metal contact is disposed on a surface of the undoped second anode region. The first metal contact and second metal contact are electrically insulated from each other by an insulating layer on the layer of polysilicon.