Polysilicon Transistor Surface Smoothing via Sacrificial Oxide Etching

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Solution Overview

Problem

Existing display devices using polysilicon transistors face challenges in achieving excellent surface quality and reduced surface roughness, which affects the performance and reliability of the transistors.

Innovation Solution

A method for manufacturing transistors with improved surface quality involves forming a preliminary polysilicon layer, depositing a sacrificial silicon oxide layer, doping the sacrificial layer and the polysilicon layer with argon ions, and then using an etchant to remove the sacrificial layer and reduce the surface roughness of the polysilicon layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a polysilicon layer is formed by crystallizing amorphous silicon, then the transistor performance is improved, but the surface roughness increases

Engineering Contradiction:
Improvetransistor performanceVSAvoidsurface roughness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A preliminary polysilicon layer is formed first, then a sacrificial layer is deposited on top of it before the surface treatment process. This preliminary structure allows subsequent processing to improve surface quality without compromising the underlying polysilicon layer that provides transistor performance

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

A sacrificial layer (silicon oxide) is introduced as an intermediary between the preliminary polysilicon layer and the surface treatment process. This sacrificial layer enables selective etching that removes protrusions from the polysilicon surface while the layer itself protects underlying regions during the process

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If argon ion doping is applied to the sacrificial layer and polysilicon layer, then the etch rate is enhanced, but the process complexity increases

Engineering Contradiction:
Improveetch rateVSAvoidprocess complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The physical and chemical parameters of the sacrificial layer and polysilicon layer are modified through argon ion doping. This doping changes the etch rate characteristics of these layers, enabling selective removal of the sacrificial layer and protrusions while maintaining control over the polysilicon layer integrity

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The etching process is applied selectively to specific regions - the sacrificial layer and protrusions are removed while the main polysilicon layer is preserved. The argon ion doping provides enhanced etch rates that allow this selective removal to occur efficiently without requiring excessive processing

Inventive Principle:
Principle #16Partial or excessive action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method effectively reduces the surface roughness of the polysilicon layer to less than 50% of its initial roughness, enhancing the surface quality and reliability of the transistors used in display devices.

Implementation Method 1

providing argon (Ar) ions in an upper portion of the sacrificial layer to dope the sacrificial layer and the preliminary polysilicon layer

Methodology Applied
Scientific EffectIon implantation: Ion Implantation

Implementation Method 2

providing an etchant to an upper portion of the doped sacrificial layer, and removing the sacrificial layer

Methodology Applied
Scientific EffectChemical etching:

Implementation Method 3

the preliminary polysilicon layer may be formed in an operation of performing crystallization by providing an excimer laser to an amorphous silicon layer

Methodology Applied
Scientific EffectLaser heating: Laser

Data Source

PatentEP4514092A1Method for manufacturing transistor, display device including the transistor, and method for manufacturing the display device
Publication Date: 2025.02.26 SAMSUNG DISPLAY CO LTD
  • EP4514092A1 patent drawingFigure 1
  • EP4514092A1 patent drawingFigure 2
  • EP4514092A1 patent drawingFigure 3

AI summary

A method for manufacturing a transistor includes providing a preliminary polysilicon layer including an upper surface on which protrusions are formed, providing a sacrificial layer on the upper surface of the preliminary polysilicon layer, providing argon (Ar) ions in an upper portion of the sacrificial layer to dope the sacrificial layer and the preliminary polysilicon layer, providing an etchant to an upper portion of the doped sacrificial layer, and removing the sacrificial layer, and etching the protrusions to form a polysilicon layer.