Polysilicon TFT Array Substrate Fabrication via Five-Mask Process
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Solution Overview
Problem
The existing liquid crystal display (LCD) devices using hydrogenated amorphous silicon thin film transistors (a-Si TFTs) face instability and degraded electrical characteristics due to light and electric field exposure, making them unsuitable for driving circuits, and the multi-mask process for fabricating array substrates increases production costs and reduces yield.
Innovation Solution
A liquid crystal display device with a bottom gate structure and a method of fabricating it using a reduced number of mask processes, where polycrystalline silicon thin film transistors (p-Si TFTs) are employed, and source and drain electrodes are formed after a passivation layer is applied to protect the channel, allowing for a five-mask process and improved production yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If hydrogenated amorphous silicon thin film transistors are used, then productivity is improved and low-cost glass substrates can be used, but reliability deteriorates due to instability under light and electric field exposure
Solution Approach 1:
The patent changes the material parameter from hydrogenated amorphous silicon to polycrystalline silicon, which fundamentally alters the atomic structure and electrical properties. This parameter change resolves the contradiction by providing both high mobility (enabling driving circuits) and stability (resistance to light and electric field effects) while maintaining compatibility with large-area substrate fabrication
2Reliability
If polycrystalline silicon thin film transistors are used, then reliability is improved through higher field effect mobility, but device complexity increases due to additional fabrication steps
Solution Approach 1:
The patent merges the formation of gate electrodes, pixel electrodes, and capacitor electrodes into a single patterned conductive layer formed through one mask process. This consolidation reduces the number of discrete fabrication steps while maintaining the functional requirements for high-mobility polycrystalline silicon transistors, thereby resolving the contradiction between reliability and fabrication complexity
3Manufacturing precision
If multiple mask processes are used for fabricating array substrates, then manufacturing precision is improved, but productivity deteriorates due to increased production time and cost
Solution Approach 1:
The patent combines multiple electrode formation steps into a single mask process where gate electrodes, pixel electrodes, and capacitor electrodes are patterned simultaneously. This reduces the total number of mask processes from multiple sequential steps to one integrated step, improving production efficiency while maintaining the precision required for proper electrode alignment through careful mask design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces production costs and improves yield by simplifying the fabrication process, enhances the reliability of thin film transistors, and maintains the stability of polycrystalline silicon layers, enabling efficient formation of driving circuits and switching elements on a single substrate.
Implementation Method 1
a laser beam is irradiated onto the amorphous silicon layer to crystallize the amorphous silicon layer, thereby forming a polycrystalline silicon layer
Implementation Method 2
an electric field is generated that changes the orientation of liquid crystal molecules of the liquid crystal layer due to optical anisotropy within the liquid crystal layer. Consequently, light transmittance characteristics of the liquid crystal layer are modulated
Data Source
AI summary
A polycrystalline silicon thin film transistor of a bottom gate structure is used as a switching element and a mask having transmissive, half-transmissive and blocking areas is used so that an array substrate for a liquid crystal display device having a monolithic driving circuit can be fabricated through a six-mask process.