Polysilicon Thin Film Transistor Grain Boundary Defect Reduction
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Solution Overview
Problem
Current methods for producing polysilicon thin film transistors result in defects such as grain boundary defects and non-uniformity, leading to poor electric performance and reliability due to the amorphous silicon layer conversion process.
Innovation Solution
A manufacturing method involving a substrate with pre-formed grooves and crystal seeds on a buffer layer, followed by an amorphous silicon layer deposition and thermal treatment to achieve high crystallization and reduce grain boundary defects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If excimer laser annealing method is used to transfer amorphous silicon layer into polysilicon layer, then the polysilicon TFT can be manufactured, but grain boundary defects and grain non-uniformity occur leading to poor electric performance and reliability
Solution Approach 1:
The invention applies preliminary action by forming groove patterns in the buffer layer before depositing the amorphous silicon layer. These pre-formed grooves serve as guides for crystal grain growth during subsequent thermal treatment, ensuring uniform grain structure and reducing grain boundary defects in the final polysilicon layer, thereby improving reliability without sacrificing manufacturing precision
Solution Approach 2:
The invention changes the physical and chemical parameters of the buffer layer by creating groove patterns with specific dimensions (width, depth, spacing). These parameter changes in the buffer layer structure directly influence the crystallization process of the overlying amorphous silicon, promoting uniform grain growth and reducing defects, thus resolving the contradiction between reliability and manufacturing precision
2Ease of manufacture
If conventional polysilicon manufacturing process is used, then thin film transistor can be formed, but the polysilicon layer exhibits poor uniformity and high defect density
Solution Approach 1:
The invention introduces the buffer layer with groove patterns as an intermediary structure between the substrate and the amorphous silicon layer. This intermediary plays a crucial role in controlling the crystallization process, guiding grain growth, and ensuring uniform polysilicon layer formation, thereby improving manufacturing precision while maintaining ease of manufacture through standard semiconductor fabrication processes
Solution Approach 2:
The invention applies segmentation by dividing the buffer layer into regions separated by grooves. This segmentation creates distinct zones that guide crystal grain growth independently, preventing grain boundary defects and ensuring uniformity across the entire polysilicon layer, thus resolving the contradiction between ease of manufacture and manufacturing precision
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method enhances the crystallization and uniformity of the polysilicon layer, improving the electric performance and reliability of the polysilicon thin film transistor, thereby enhancing the display effect of the array substrate and display device.
Implementation Method 1
transferring the amorphous silicon layer into a polysilicon layer using a thermal treatment process
Implementation Method 2
transferring the amorphous silicon layer into a polysilicon layer using a thermal treatment process (solid phase crystallization method or an excimer laser annealing method)
Implementation Method 3
forming crystal seeds on the buffer layer; transferring the amorphous silicon layer into a polysilicon layer using a thermal treatment process
Data Source
AI summary
A manufacturing method of a polysilicon layer and a manufacturing method of a polysilicon thin film transistor. The manufacturing method of the polysilicon layer includes: providing a substrate; forming a barrier layer and a buffer layer on the substrate; disposing a plurality of grooves in the buffer layer by a patterning process, and forming crystal seeds on the buffer layer; forming an amorphous silicon layer on the buffer layer provided with the grooves and on the crystal seeds; transferring the amorphous silicon layer into a polysilicon layer using a thermal treatment process.