Polysilicon TFT Photomask Reduction via Gray-Scale Masking
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Solution Overview
Problem
The increasing miniaturization of pixel transistors in liquid crystal displays leads to exponential increases in photomask costs due to the need for multiple photomask steps in manufacturing.
Innovation Solution
The method involves using two gray-scale mask processes and utilizing the gate as a light shielding layer, omitting a planar layer, and employing a bottom electrode (bottom ITO) as a pixel electrode to reduce the number of photomasks required, thereby decreasing manufacturing costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If multiple photomask steps are used to achieve precise transistor patterning in miniaturized displays, then manufacturing precision is improved, but manufacturing cost increases exponentially
Solution Approach 1:
The patent combines multiple photomask steps into a single photomask by integrating the light shielding layer pattern directly into the photomask design. This allows simultaneous formation of the light shielding layer and transistor electrode patterns in one exposure step, reducing the number of photomasks from nine to six while maintaining precise transistor patterning through the integrated pattern design
Solution Approach 2:
The photomask serves multiple functions simultaneously: it defines the transistor electrode patterns, defines the light shielding layer pattern, and enables precise alignment for miniaturized transistors. This multi-functional photomask approach eliminates the need for separate photomasks for each layer, reducing overall photomask count while maintaining manufacturing precision
2Ease of manufacture
If the number of photomasks is reduced to lower manufacturing cost, then ease of manufacture is improved, but manufacturing precision may deteriorate
Solution Approach 1:
The patent merges the light shielding layer formation and transistor electrode patterning into a single photomask step. The integrated pattern design ensures that both the light shielding layer and transistor electrodes are formed with precise alignment in one exposure, maintaining manufacturing precision while reducing photomask count from nine to six
Solution Approach 2:
The light shielding layer is formed with preliminary patterning through the integrated photomask design before subsequent processing steps. This preliminary action ensures that the light shielding layer is precisely positioned relative to the transistor electrodes from the outset, maintaining patterning precision without requiring additional alignment steps
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number of photomasks needed from nine to six, lowering manufacturing costs while maintaining high image quality and resolution in liquid crystal displays.
Implementation Method 1
using two gray-scale mask processes and utilizing the gate as a light shielding layer
Data Source
AI summary
A display panel and method of manufacturing the same are provided. The method of manufacturing the display panel includes the steps of providing a substrate, forming a gate on the substrate, forming a gate insulating layer on the gate and the substrate, forming a polysilicon layer on the gate insulating layer, performing a first gray-scale mask process on the polysilicon layer to form a source region, a drain region and an active region located between the source region and the drain region by the polysilicon layer, forming an interlayer dielectric layer on the gate insulating layer and the polysilicon layer, forming a first electrode layer on the interlayer dielectric layer, performing a second gray-scale mask process on the first electrode layer and the interlayer dielectric layer.