Polysilicon Thin Film Transistor Lateral Solidification

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Solution Overview

Problem

Thin film transistors with semiconductor layers made of polysilicon under a metal pattern, such as a gate electrode or light blocking member, often suffer from uncompleted crystallization growing regions due to heat flow issues during laser annealing, leading to deteriorated driving characteristics and reliability.

Innovation Solution

The use of directional lateral solidification to crystallize amorphous silicon into polysilicon without uncompleted crystallization growing regions, where a line-shaped laser beam is used to melt and crystallize the silicon, forming a seed with a temperature gradient that promotes lateral grain growth parallel to the laser direction, resulting in a polysilicon layer with a surface roughness less than 15 nm.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional laser annealing is used to crystallize amorphous silicon into polysilicon under a metal pattern, then the semiconductor layer can be formed, but uncompleted crystallization growing regions are created due to heat flow issues, deteriorating driving characteristics and reliability

Engineering Contradiction:
Improvethin film transistor reliabilityVSAvoidcrystallization completeness
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent changes the crystallization method from conventional laser annealing to directional lateral solidification. This involves using a line-shaped laser beam with specific energy density (150-1000 mJ/cm²) and width (5-20 μm) to create a temperature gradient that promotes complete and directional crystallization, eliminating uncompleted growing regions while maintaining manufacturing feasibility

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces directional lateral solidification that grows crystals in a specific lateral direction parallel to the metal pattern. This dimensional approach to crystallization control ensures complete grain formation under the metal pattern by promoting lateral grain growth rather than random crystallization, thereby improving both completeness and reliability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional laser annealing is used, then polysilicon can be formed, but the grain structure is insufficient leading to deteriorated driving characteristics

Engineering Contradiction:
Improvedriving characteristicsVSAvoidgrain structure stability
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The patent modifies the laser beam parameters (line-shaped, 5-20 μm width, specific energy density) to create controlled temperature gradients that promote the formation of stable, large-grain polysilicon structures. This directional crystallization process ensures consistent grain orientation and size, improving driving characteristics while maintaining compositional stability

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

By implementing lateral directional solidification, the patent creates a controlled grain growth direction parallel to the metal pattern. This dimensional control results in uniform, stable grain structures that enhance the stability of the semiconductor layer composition and improve overall device reliability

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Manufacturing precision

If a line-shaped laser beam is used for directional lateral solidification, then complete crystallization is achieved, but the process complexity increases

Engineering Contradiction:
Improvecrystallization completenessVSAvoidcrystallization process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent segments the laser beam into a line-shaped configuration with specific dimensions (5-20 μm width) rather than using a conventional point or broad beam. This segmentation allows precise control of the temperature gradient and crystallization front, achieving complete crystallization while maintaining a relatively simple single-step process that can be integrated into existing manufacturing

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This method improves the driving characteristics and reliability of thin film transistors by eliminating uncompleted crystallization growing regions and enhancing grain size, leading to improved performance in display devices.

Implementation Method 1

irradiating with a pulse type to a predetermined region of the amorphous silicon layer with a line-shaped laser beam

Methodology Applied
Scientific EffectLaser heating: Laser

Implementation Method 2

crystallizing the amorphous silicon layer into a polysilicon layer by using a directional lateral solidification process

Methodology Applied
Scientific EffectDirectional lateral solidification: Crystallisation

Implementation Method 3

heat flow issues during laser annealing

Methodology Applied
Scientific EffectHeat flow: Conduction (thermal)

Data Source

PatentUS8952368B2Thin film transistor and display device having the same
Publication Date: 2015.02.10 SAMSUNG DISPLAY CO LTD
  • US8952368B2 patent drawing
  • US8952368B2 patent drawing
  • US8952368B2 patent drawing

AI summary

A thin film transistor, a method of manufacturing the same, and a display device including the same, the thin film transistor including a substrate; a polysilicon semiconductor layer on the substrate; and a metal pattern between the semiconductor layer and the substrate, the metal pattern being insulated from the semiconductor layer, wherein the polysilicon of the semiconductor layer includes a grain boundary parallel to a crystallization growing direction, and a surface roughness of the polysilicon semiconductor layer defined by a distance between a lowest peak and a highest peak in a surface thereof is less than about 15 nm.