Polysilicon TFT Pixel Structure Leakage Mitigation
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Solution Overview
Problem
Current polysilicon TFT pixel structures experience current leakage due to the height of island-like polysilicon patterns, which affects the uniformity of the gate insulating layer and leads to electrical issues.
Innovation Solution
The pixel structure incorporates a design where the first and second insulating patterns are separated and covered by another insulating layer, with gradient side walls to reduce the likelihood of current leakage between the gates and polysilicon patterns, and includes specific layers and manufacturing steps to form the polysilicon and insulating patterns with controlled thickness and coverage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If an island-like polysilicon pattern with certain height is used to form the channel region, then the aperture ratio can be increased and luminosity improved, but the gate insulating layer experiences undesired step coverage leading to current leakage
Solution Approach 1:
The gate insulating layer is segmented into a first gate insulating layer and a second gate insulating layer with different dielectric constants. The first layer (with higher dielectric constant) is positioned closer to the polysilicon pattern, while the second layer (with lower dielectric constant) is positioned farther away. This segmentation allows the electric field to be better confined, reducing current leakage through the gate insulating layer while maintaining the beneficial high aperture ratio design.
Solution Approach 2:
Different regions of the gate insulating structure are assigned different dielectric properties. The first gate insulating layer has a higher dielectric constant to provide strong electric field confinement near the channel, while the second gate insulating layer has a lower dielectric constant to reduce field penetration into the substrate. This local differentiation of material properties optimizes both the electrical performance and reliability of the device.
2Ease of manufacture
If the gate insulating layer is made with uniform thickness, then the manufacturing process is simplified, but current leakage occurs due to the height of side walls of the island-like polysilicon pattern
Solution Approach 1:
The gate insulating layer is divided into multiple sub-layers with different dielectric constants rather than using a single uniform layer. This segmentation enables better electrical isolation despite the polysilicon pattern height, as the higher dielectric constant material in the first layer provides stronger field confinement right at the interface with the channel region.
Solution Approach 2:
The gate insulating structure uses a composite of different dielectric materials with varying dielectric constants. This composite structure is designed to optimize the balance between electrical isolation performance and manufacturing feasibility, allowing the system to achieve reliable current blocking without requiring excessively complex fabrication processes.
Data Source
AI summary
A pixel structure is provided. A first insulating pattern is on the first polysilicon pattern. A second insulating pattern is on the second polysilicon pattern and separated from the first insulating pattern. An insulating layer covers the first and the second insulating patterns. A first gate and a second gate are on the insulating layer. A first covering layer covers the first and the second gates. A first source metal layer and a first drain metal layer are on the first covering layer and electrically connected to a first source region and a first drain region. A second source metal layer and a second drain metal layer are on the first covering layer and electrically connected to a second source region and a second drain region. A pixel electrode is electrically connected to the first drain metal layer.