Polysilicon TFT Sense Amplifier Hysteresis Suppression
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Solution Overview
Problem
Polysilicon TFT-based DRAMs experience readout errors due to inferior sensitivity of the latch-type sense amplifier, leading to unstable output across a wide voltage range, primarily caused by a hysteresis effect from the floating body in polysilicon TFTs, which affects the circuit's operation and integration density.
Innovation Solution
A semiconductor device with a circuit composed of MOS transistors that applies a step waveform voltage not less than the threshold voltage of the MOS transistors a predetermined number of times between the gate and source, effectively regulating body potentials and suppressing the hysteresis effect, thereby improving the sensitivity and stability of the latch-type sense amplifier circuit.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If polysilicon TFTs are used in latch-type sense amplifier circuits, then the circuit can be integrated on glass substrates with lower manufacturing cost, but the sensitivity of the sense amplifier deteriorates due to hysteresis effect from floating body
Solution Approach 1:
The invention applies preliminary action by resetting the body potential of polysilicon TFTs to a fixed level before the sense amplifier operates. A body potential reset circuit is activated before reading memory cell data to eliminate hysteresis effects from floating body charge accumulation, thereby ensuring stable and sensitive sense amplifier operation while maintaining the benefits of polysilicon TFT integration on glass substrates
2Productivity
If polysilicon TFTs with floating body are used, then device integration density increases, but output stability deteriorates due to hysteresis effect
Solution Approach 1:
The body potential reset circuit performs preliminary action by resetting the floating body potential to a known fixed level before the sense amplifier reads memory cell data. This preliminary reset eliminates hysteresis effects that would otherwise cause output instability, enabling stable operation of high-density integrated circuits using polysilicon TFTs on glass substrates
3Measurement precision
If step waveform voltage is applied to reset body potential, then hysteresis effect is suppressed and sensitivity improves, but additional circuit complexity is introduced
Solution Approach 1:
The body potential reset circuit is designed to be self-service by using the existing memory cell bit lines and word lines to apply the step waveform voltage for resetting transistor body potentials. The reset operation is automatically triggered by the memory read/write timing signals, eliminating the need for separate control circuits and minimizing additional complexity while effectively suppressing hysteresis effects
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes the output of the latch-type sense amplifier, reducing the unstable region and enhancing the sensitivity, allowing for a higher degree of integration and improved electrical characteristics in polysilicon TFT-based circuits.
Implementation Method 1
a hysteresis effect from the floating body in polysilicon TFTs, which affects the circuit's operation
Data Source
AI summary
A device excellent in electrical characteristics is provided by suppressing an operation failure owing to a hysteresis effect that occurs in a circuit using MOS transistors having floating bodies. Moreover, sensitivity of a sense amplifier circuit and a latch circuit including these MOS transistors as components is improved. A signal required in a circuit other than a first circuit is outputted by using electrical characteristics of MOS transistors in a first period (effective period), and in a second period (idle period) excluding the first period, between the gate and source of MOS transistors, a step waveform voltage not less than threshold voltages of these MOS transistors is given.