Polysilicon Thin Film Transistor Array Substrate with Variable Grain Sizes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing thin film transistor (TFT) array substrate fabrication methods, such as the TDX laser crystallization technique, face challenges in productivity due to increased process time and substrate movement requirements, which hinder the achievement of high carrier mobility and uniform poly-silicon film quality across the substrate.
Innovation Solution
The method involves forming poly-silicon islands with main grain boundaries only in the source and drain regions, and sub grain boundaries in the channel regions, using a laser beam to irradiate an amorphous silicon layer with varying scan pitches, resulting in TFTs with high carrier mobility and enhanced processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If TDX laser crystallization technique is used to obtain high crystal quality poly-silicon film, then carrier mobility is improved, but process time is increased
Solution Approach 1:
The substrate is divided into multiple regions (first region and second region) with different crystallization requirements. The laser beam is selectively applied to different regions with different scan pitches, allowing optimized processing for each region rather than using a uniform slow process across the entire substrate.
Solution Approach 2:
Different regions of the substrate are assigned different scan pitches based on their specific requirements. The first region uses a first scan pitch while the second region uses a second scan pitch, allowing local optimization of crystallization quality and processing speed in different areas of the substrate.
2Manufacturing precision
If substrate is moved within half the region of substrate irradiated by laser beam, then poly-silicon film uniformity is improved, but number of substrate movements is increased
Solution Approach 1:
The substrate processing is segmented into multiple regions that can be irradiated in different passes. By dividing the substrate into first and second regions with different scan pitch requirements, the total number of substrate movements is reduced while maintaining uniformity in each region.
Solution Approach 2:
The scan pitch is made dynamic and adjustable based on the region being processed. The system can switch between first scan pitch and second scan pitch depending on the region, allowing optimization of both film uniformity and processing efficiency rather than using a fixed scan pitch throughout.
3Manufacturing precision
If more laser shots are required to achieve uniform poly-silicon quality, then main crystal boundaries uniformity is improved, but processing efficiency is reduced
Solution Approach 1:
Different regions are assigned different scan pitches based on their specific crystallization needs. The first region receives laser shots with a first scan pitch while the second region receives laser shots with a second scan pitch, allowing each region to achieve its required crystal boundary uniformity with the appropriate number of passes.
Solution Approach 2:
The scan pitch parameter is changed based on the region being processed. By adjusting the scan pitch between first scan pitch and second scan pitch for different regions, the system optimizes the balance between achieving uniform crystal boundaries and maintaining processing efficiency.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in TFTs with high carrier mobility and excellent device characteristics, while reducing the process time and substrate movement, thereby improving productivity and yield.
Implementation Method 1
by irradiating the amorphous silicon layer with a laser beam, a poly-silicon layer is formed
Implementation Method 2
the amorphous silicon region irradiated with the laser beam starts to crystallize
Data Source
AI summary
A thin film transistor array substrate includes a substrate, a plurality of poly-silicon islands and a plurality of gates. The substrate has a display region, a gate driver region and a source driver region. Each poly-silicon island disposed on the substrate has a source region, a drain region and a channel region disposed therebetween. The poly-silicon islands include several first poly-silicon islands and several second poly-silicon islands. The first poly-silicon islands having main grain boundaries and sub grain boundaries are only disposed within the display region and the gate driver region. The main grain boundaries of the first poly-silicon islands are only disposed within the source regions and/or the drain regions. The second poly-silicon islands are disposed in the source driver region. Grain sizes of the first poly-silicon islands are substantially different from those of the second poly-silicon islands. Gates corresponding to the channel regions are disposed on the substrate.