Polysynchronous Stochastic Circuits for Clock Distribution

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Solution Overview

Problem

Modern large-scale integrated circuits face significant design bottlenecks due to the complexity and resource-intensive nature of clock distribution networks (CDNs) required for synchronizing clock signals across synchronous components, leading to increased area, power consumption, and performance limitations.

Innovation Solution

The implementation of polysynchronous stochastic circuits that allow for relaxed timing requirements and the use of local clocks, eliminating the need for a rigorous global clock distribution network by tolerating clock skew and misalignment, enabling fine-grained splitting of clock domains and reducing the complexity of handshaking mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a global clock distribution network is used to synchronize clock signals across synchronous components, then timing synchronization is improved, but area consumption and power consumption increase significantly

Engineering Contradiction:
Improvetiming synchronizationVSAvoidarea consumption
Core Design Contradiction:
Manufacturing precisionVSArea of stationary object

Solution Approach 1:

The patent divides the system into multiple independent clock domains, each with its own local clock signal. Instead of using a single global clock distribution network, the system segments the clocking function across multiple domains. Each clock domain operates independently with locally generated clock signals, eliminating the need for extensive global clock routing while maintaining synchronization within each domain.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements local clock generation within each clock domain using ring oscillators. Each domain has its own local clock signal source that generates clock signals tailored to its specific timing requirements. This local approach eliminates the need for distant global clock distribution, reducing area consumption and power usage while maintaining adequate timing synchronization within each domain.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If a global clock distribution network is used to synchronize clock signals across synchronous components, then timing synchronization is improved, but power consumption increases significantly

Engineering Contradiction:
Improvetiming synchronizationVSAvoidpower consumption
Core Design Contradiction:
Manufacturing precisionVSUse of energy by stationary object

Solution Approach 1:

The patent segments the clock distribution function into multiple independent clock domains, each with its own local clock source. This segmentation eliminates the need for power-intensive global clock routing across the entire chip. Each local clock domain consumes power only for its own operations rather than supporting the entire system through a global network.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Each clock domain is self-sufficient with its own local ring oscillator that generates clock signals independently. The local clock generators serve their respective domains without requiring power from a centralized global clock source. This self-service approach significantly reduces overall power consumption by eliminating redundant clock signal distribution across the entire system.

Inventive Principle:
Principle #25Self-service

3Area of stationary object

If local clocks are used in polysynchronous stochastic circuits, then area and power consumption are reduced, but clock skew and misalignment increase

Engineering Contradiction:
Improvearea consumptionVSAvoidclock skew
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent changes the fundamental parameter representation from deterministic binary values to stochastic bit streams. In this stochastic domain, computational units process probabilistic information where the exact timing alignment becomes less critical. The system tolerates clock skew by design, as the stochastic computation model inherently handles timing variations through statistical processing rather than requiring precise synchronous alignment.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent uses simple ring oscillator circuits as local clock sources, which are much cheaper and simpler than global clock distribution infrastructure. These local oscillators accept some degree of skew and misalignment as tolerable trade-offs for the significant reductions in area and power consumption. The stochastic processing units are designed to be robust against timing variations, making the system resilient to clock imperfections.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS10520975B2Polysynchronous stochastic circuits
Publication Date: 2019.12.31 REGENTS OF THE UNIVERSITY OF MINNESOTA
  • US10520975B2 patent drawing
  • US10520975B2 patent drawing
  • US10520975B2 patent drawing

AI summary

In some examples, a device includes an integrated circuit and two or more computational units configured to process respective stochastic bit streams in accordance with respective input clocks. Each of the stochastic bit streams comprises sequential sets of data bits, each of the sets of data bits representing a numerical value based on a probability that any bit in the respective set of data bits is one. The respective input clocks for each of the two or more computational units are unsynchronized.