Package-on-Package Anti-Mold Flash Substrate Design
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Solution Overview
Problem
Current multi-chip packages face challenges in achieving reliable assembly, testing, and increased integrated circuit density due to limitations in identifying known-good-die (KGD) before assembly, leading to yield issues and increased costs, especially in vertically stacked configurations where individual circuit testing is complicated and prone to assembly defects.
Innovation Solution
The integrated circuit package-on-package system incorporates a mountable substrate with a mold structure and anti-mold flash features, including extension portions and dam structures, to prevent mold flash and contamination, allowing for improved adhesion and exposure of contact pads during encapsulation, enabling reliable electrical and mechanical attachments between integrated circuits.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional multi-chip packages are assembled before testing, then integrated circuit density increases, but individual circuit testing becomes complicated and assembly yield decreases
Solution Approach 1:
The patent applies preliminary action by enabling individual integrated circuit testing to be performed before assembly into the multi-chip package. The test substrate allows each die to be tested independently in advance, identifying known-good-die (KGD) prior to assembly. This preliminary testing step resolves the contradiction by maintaining high circuit density while improving assembly yield through early defect detection.
2Area of stationary object
If vertically stacked integrated circuits are assembled, then space efficiency improves, but testing and failure mode identification become more difficult
Solution Approach 1:
The patent applies segmentation by separating the testing function from the final stacked assembly. Individual integrated circuits are tested separately on a test substrate before being assembled into the vertical stack. This segmentation allows each component to be independently characterized and tested, making failure mode identification straightforward despite the eventual compact stacked configuration.
3Strength
If encapsulation process is used for forming packaged integrated circuit, then mechanical support and protection are provided, but mold flash or bleed contamination occurs impeding reliable attachments
Solution Approach 1:
The patent applies the taking out principle by removing the problematic encapsulation step from the assembly process. Instead of using mold flash-prone encapsulation materials, the design exposes the mountable substrate and contact pads, eliminating the source of mold flash contamination while maintaining mechanical support through the substrate structure itself.
4Device complexity
If individual integrated circuits are tested after assembly, then manufacturing process is simplified, but known-good-die cannot be identified before assembly leading to yield problems
Solution Approach 1:
The patent implements preliminary action by performing individual integrated circuit testing before assembly into the multi-chip package. The test substrate enables each die to be tested and characterized in advance, allowing only known-good-die to proceed to assembly. This approach maintains manufacturing process simplicity while dramatically improving assembly yield through early defect detection and selection.
Data Source
AI summary
An integrated circuit package-on-package system includes: mounting an integrated circuit package system having a mountable substrate over a package substrate with the mountable substrate having a mold structure; forming a package encapsulation having a recess over the package substrate and the integrated circuit package system. The present invention also includes: forming an anti-mold flash feature with an extension portion of the package encapsulation and constrained by the mold structure at the bottom of the recess, and partially exposing the mountable substrate in the recess with the anti-mold flash feature formed with the mold structure; and mounting an integrated circuit device over the mountable substrate in the recess.