Transparent Clock Asymmetric Delay Compensation in PONs
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Solution Overview
Problem
Passive optical networks (PONs) introduce asymmetric delays in packet transmission, which complicates the accurate distribution of precise time synchronization, as existing protocols assume symmetrical network characteristics and significant delay variation.
Innovation Solution
The implementation of a distributed transparent clock system within PONs, where devices calculate and adjust the residence time of precision time protocol (PTP) packets to account for asymmetric delays, ensuring equalization of downstream and upstream delays by modifying the time stamp correction field, allowing for accurate synchronization of client devices with a grandmaster clock.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If standard time synchronization protocols are used in PONs, then time distribution can be implemented, but accuracy deteriorates due to asymmetric delays and delay variations
Solution Approach 1:
A transparent clock is introduced as an intermediary device within the PON network that measures and compensates for residence time delays. The transparent clock intercepts PTP packets, calculates the time spent in the network, and adjusts timestamps to compensate for asymmetric delays, thereby improving synchronization accuracy without requiring changes to endpoint devices
Solution Approach 2:
The patent replaces the assumption of symmetrical network characteristics (traditional mechanical model) with actual measurement of asymmetrical delay characteristics. By substituting the theoretical symmetrical model with empirical delay measurement and compensation, the system achieves accurate time synchronization despite inherent network asymmetries
2Adaptability or versatility
If PON components process PTP packets, then time distribution function is provided, but delay variation increases due to packet switching and load changes
Solution Approach 1:
The transparent clock implements feedback by continuously monitoring residence time of PTP packets and using this information to compensate for delays. The measured delay characteristics feed back into the timestamp correction mechanism, allowing the system to adapt to changing network conditions and maintain synchronization accuracy despite variable loads
Solution Approach 2:
The transparent clock performs preliminary measurement and compensation of residence time delays before PTP packets reach their destination. By pre-calculating and applying delay corrections in advance, the system eliminates the need for endpoints to handle complex delay compensation, simplifying the overall synchronization process
3Measurement precision
If asymmetric delay compensation is implemented, then synchronization accuracy improves, but device complexity increases
Solution Approach 1:
The transparent clock functionality is segmented into distinct modular components: PTP packet interception module, residence time measurement module, timestamp correction module, and packet forwarding module. This segmentation allows each component to perform a specific function independently, simplifying implementation and maintenance while achieving comprehensive delay compensation
Data Source
AI summary
One or more devices of a network having asymmetric delay are configured to participate in time synchronization protocol sessions in which a client device synchronizes its local clock to a master device. In one example, a system includes an optical line terminal configured to receive a time synchronization protocol packet from a grandmaster clock and an optical network unit (ONU) configured to calculate a residence time of the time synchronization protocol packet, encode the residence time into the packet, and to forward the packet to a client device. Moreover, the system may participate in a plurality of time synchronization protocol sessions with a plurality of client devices, such that the client devices become synchronized in frequency and phase.