Pooled Memory Controller Load Balancing

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Solution Overview

Problem

Cloud computing systems face challenges in managing memory pooling, where memory access requests can lead to network bandwidth overutilization and increased latency due to disparities in memory pool utilization, causing service level agreement (SLA) violations.

Innovation Solution

Implementing a pooled memory controller that allocates address ranges across multiple memory pools based on class of service (CLOS) and performance capabilities, using load balancing and interleaving to manage memory and network bandwidth, and predicting future utilization to balance workload across memory pools.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If memory access requests are handled without load balancing, then memory capacity can be increased, but network bandwidth overutilization and latency increase

Engineering Contradiction:
Improvememory capacityVSAvoidmemory access latency
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent segments memory access requests into different queues based on service levels and memory pool destinations. The memory controller divides the incoming request stream into multiple categorized queues, allowing differentiated handling and load balancing across multiple memory pools, thereby preventing any single pool from becoming a bottleneck while maintaining high memory capacity utilization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic load balancing where the memory controller continuously monitors the utilization state of multiple memory pools and dynamically adjusts the distribution of memory access requests in real-time. This dynamic adaptation allows the system to respond to changing workload patterns and prevent network bandwidth overutilization while maintaining optimal memory access latency.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If memory access requests are concentrated on single memory pool, then allocation is simplified, but network bandwidth overutilization occurs

Engineering Contradiction:
Improvememory allocation complexityVSAvoidnetwork bandwidth utilization
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent segments memory access requests into different queues based on service levels and memory pool destinations. The memory controller divides the incoming request stream into multiple categorized queues, allowing differentiated handling and load balancing across multiple memory pools, thereby preventing any single pool from becoming a bottleneck while maintaining high memory capacity utilization.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The memory controller acts as an intermediary between compute nodes and multiple memory pools, implementing load balancing logic that monitors utilization states and dynamically distributes requests. This intermediary function simplifies the overall system by providing a centralized intelligence point that manages complexity while preventing network bandwidth overutilization across the distributed memory architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Loss of energy

If load balancing is implemented across multiple memory pools, then network bandwidth is balanced, but system complexity increases

Engineering Contradiction:
Improvenetwork bandwidth utilizationVSAvoidmemory controller complexity
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent implements a self-service load balancing mechanism where the memory controller autonomously monitors the utilization state of multiple memory pools and automatically adjusts request distribution without external intervention. The system uses telemetry data and utilization metrics to self-regulate traffic patterns, reducing the need for complex external management while maintaining balanced network bandwidth utilization across memory pools.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent incorporates feedback mechanisms where the memory controller continuously monitors utilization state and performance metrics from multiple memory pools, using this feedback to dynamically adjust load balancing decisions. This closed-loop control enables the system to adapt to changing conditions and maintain optimal performance while managing complexity through data-driven automation rather than static complex configurations.

Inventive Principle:
Principle #23Feedback

4Productivity

If memory pools are unequally utilized, then some pools can be overused, but service level agreements are violated

Engineering Contradiction:
Improvememory pool utilization efficiencyVSAvoidservice level agreement compliance
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by implementing service level-specific handling for different types of memory access requests. The memory controller identifies requests requiring guaranteed performance and routes them through dedicated paths with priority handling, while allowing best-effort requests to utilize available capacity. This differentiated approach ensures that critical workloads meet service level agreements while maintaining high overall utilization efficiency across memory pools.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements dynamic load balancing where the memory controller continuously monitors the utilization state of multiple memory pools and dynamically adjusts the distribution of memory access requests in real-time. This dynamic adaptation allows the system to respond to changing workload patterns and prevent network bandwidth overutilization while maintaining optimal memory access latency.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20220197819A1Dynamic load balancing for pooled memory
Publication Date: 2022.06.23 INTEL CORP
  • US20220197819A1 patent drawing
  • US20220197819A1 patent drawing
  • US20220197819A1 patent drawing

AI summary

Examples described herein relate to a memory controller to allocate an address range for a process among multiple memory pools based on a service level parameters associated with the address range and performance capabilities of the multiple memory pools. In some examples, the service level parameters include one or more of latency, network bandwidth, amount of memory allocation, memory bandwidth, data encryption use, type of encryption to apply to stored data, use of data encryption to transport data to a requester, memory technology, and/or durability of a memory device.