Pooling Calculation Device Multi-Channel Parallel Processing
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Solution Overview
Problem
Conventional pooling operations performed by central processing units (CPUs) face limitations in processing speed and data storage requirements, leading to inadequate performance in neural network calculations.
Innovation Solution
A pooling calculation device and method that simultaneously process data from multiple channels, utilizing an internal memory, pooling calculation circuit, and registers to efficiently perform pooling operations, with the number of channels matched to the internal memory bandwidth.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If a CPU executes conventional pooling operation, then the processing follows standard sequential logic, but the processing speed is limited and cannot satisfy performance requirements
Solution Approach 1:
The pooling calculation device divides the data matrix into multiple channels and processes them simultaneously through dedicated calculation units. Each channel's data is segmented and processed in parallel, breaking the sequential bottleneck of CPU execution while maintaining calculation accuracy.
Solution Approach 2:
The invention transitions from single-channel sequential processing to multi-channel parallel processing by adding the channel dimension. Multiple calculation units operate simultaneously on different channels, effectively moving from one-dimensional sequential execution to multi-dimensional parallel computation.
2Ease of manufacture
If data storage requirements for pooling are met, then the pooling operation can be performed, but special storage requirements increase system complexity
Solution Approach 1:
The internal memory structure is designed to serve multiple functions: it stores data for multiple channels simultaneously and provides bandwidth matching for parallel access. This universal memory structure eliminates the need for separate storage configurations for different pooling operations.
Solution Approach 2:
The system changes the bandwidth parameter of the internal memory to match the number of channels being processed. By adjusting the memory bandwidth parameter to align with the parallel processing capacity, the system optimizes data access efficiency without requiring complex storage architectures.
3Productivity
If multiple channels are processed simultaneously, then the utilization rate of data transmission is enhanced, but the internal memory bandwidth must be sufficient to support all channels
Solution Approach 1:
The system dynamically matches the number of active channels with the available internal memory bandwidth. The pooling calculation device adjusts the channel processing configuration to optimize data transmission utilization based on the memory bandwidth capacity, ensuring efficient resource utilization without overflow.
Data Source
AI summary
A pooling calculation device operable to perform a pooling operation on a data matrix with multiple channels includes an internal memory, a pooling calculation circuit and multiple registers. The internal memory stores at least part of data of the data matrix. The pooling calculation circuit reads multiple sets of data corresponding to a matching number of channels, and simultaneously performs a pooling process on the data corresponding to the matching number of channels to generate multiple sets of pooling data corresponding to the matching number of channels. The multiple registers respectively correspond to the matching number of channels, and respectively store multiple sets of intermediate data for the pooling process of the data corresponding to the matching number of channels. The matching number of channels are determined according to a bandwidth of the internal memory, and the matching number is a positive integer greater than or equal to 2.