Package-on-Package Bond-on-Trace Direct Substrate Connection
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Solution Overview
Problem
Standard Package on Package (PoP) structures have large package sizes and weak mechanical strength due to wire bond connections and solder bump bridges.
Innovation Solution
The implementation of bond-on-trace (BOT) and solder mask defined (SMD) connections, where function chips are directly connected to a shared substrate with BOT or SMD connections, eliminating the need for individual substrates and allowing for multiple chips to be stacked with enhanced mechanical strength and reduced size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If wire bond connections are used to connect function chips to substrate, then electrical connections can be established, but package size becomes large and mechanical strength becomes weak
Solution Approach 1:
The patent extracts and eliminates the wire bond connections from the package structure. Instead of using wire bonds to connect function chips to substrates, the invention directly connects chips to a shared substrate using solder bumps, removing the unnecessary wire bond components that increase package size and reduce mechanical strength.
Solution Approach 2:
The patent merges multiple substrates into a single shared substrate that supports multiple function chips. This consolidation eliminates the need for individual substrates for each chip, reducing overall package size while maintaining electrical connections through direct solder bump attachments to the shared substrate.
2Reliability
If individual substrates are used for each function chip, then electrical connections can be established, but package size increases
Solution Approach 1:
The patent combines multiple individual substrates into a single shared substrate that can support multiple function chips simultaneously. This merging approach maintains reliable electrical connections through direct solder bump attachments while significantly reducing the total package size compared to using separate substrates for each chip.
Solution Approach 2:
The shared substrate is designed to serve multiple functions by supporting and electrically connecting multiple different function chips (such as logic chips and memory chips) simultaneously. This universal substrate replaces the need for multiple specialized substrates, reducing package size while maintaining connection reliability.
3Reliability
If solder bump bridges are used to connect chips, then electrical connections can be established, but package size becomes large
Solution Approach 1:
The patent extracts and eliminates the solder bump bridges that were previously used to connect chips to individual substrates. By directly attaching solder bumps from function chips to the shared substrate without intermediate bridges, the invention reduces package size while maintaining reliable electrical connections.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the creation of multi-function chips in minimal package size with increased mechanical strength, scalability for fine bump pitch, and reduced costs by eliminating the need for additional substrates and wire bonds.
Implementation Method 1
A function chip is connected to the substrate with a plurality of solder bumps, wherein the solder bumps forming a metallurgical interconnection between the chip and the substrate.
Data Source
AI summary
A package-on-package (PoP) comprises a substrate with a plurality of substrate traces, a first function chip on top of the substrate connected to the substrate by a plurality of bond-on-trace connections, and a second function chip on top of the first function chip, directly connected to the substrate. Another package-on-package (PoP) comprises: a substrate with a plurality of substrate traces, a first function chip on top of the substrate connected to the substrate by a plurality of solder mask defined (SMD) connections formed on SMD bonding pads connected to solder bumps, and a second function chip on top of the first function chip, directly connected to the substrate by a plurality of bond-on-trace connections.