PoP Gap Control and Encapsulation to Prevent Warpage and Voids
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The challenge of reducing the size and minimizing voids in integrated devices, such as mobile devices and IoT devices, while preventing interference and structural defects between closely packed integrated circuits, which can lead to non-functioning or defective devices due to warpage and weak joints in package on package (PoP) devices.
Innovation Solution
Incorporating a gap controller between integrated circuit packages to maintain a minimum gap for encapsulation layer formation, ensuring mechanical stability and preventing warpage, while using encapsulation layers to protect and isolate components, and employing a conductive shield for structural support.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If ICs are packed closer together to reduce device size, then the device dimensions are reduced, but structural defects and interference between ICs occur resulting in non-functioning devices
Solution Approach 1:
The patent implements a Package on Package (PoP) architecture where a first integrated circuit package is stacked vertically on top of a second integrated circuit package. This nesting approach in the vertical dimension (Z-axis) allows compact integration of multiple ICs without increasing the lateral footprint, thereby reducing overall device size while maintaining functional integrity through proper vertical stacking and interconnection.
Solution Approach 2:
The invention transitions from lateral packing of ICs in the X-Y plane to vertical stacking in the Z-dimension. By utilizing the third dimension for IC arrangement, the patent achieves higher integration density without the interference problems associated with close lateral packing, thus resolving the contradiction between miniaturization and reliability.
2Stability of the object's composition
If the gap between first die and second package substrate is increased to prevent warpage, then structural stability is improved, but device size increases which defeats the purpose of miniaturization
Solution Approach 1:
The patent introduces an encapsulation layer as an intermediary material filled in the gap between the first die and the second package substrate. This encapsulation layer provides mechanical support and structural stability to prevent warpage, while simultaneously occupying minimal space. The intermediary material thus enables close packing without compromising structural integrity, resolving the contradiction between stability and size.
Solution Approach 2:
The invention modifies the physical and chemical parameters of the gap-filling material by using a specially formulated encapsulation layer with appropriate viscosity, curing characteristics, and mechanical properties. This encapsulation layer can flow into narrow gaps during processing and then solidify to provide structural support, enabling stable PoP construction with minimal gap dimensions and thus preventing warpage without increasing device size.
3Reliability
If a cover is used to protect components from external environment, then reliability is improved, but voids are created resulting in wasted space
Solution Approach 1:
The patent merges the protective cover function with the encapsulation layer that already exists in the PoP structure. The encapsulation layer serves dual purposes: filling the gap between packages for structural support and providing environmental protection for the integrated circuits. This consolidation eliminates the need for a separate cover, thereby preventing void formation and reducing overall device volume while maintaining protection and reliability.
Solution Approach 2:
The encapsulation layer is designed to perform multiple functions simultaneously: mechanical support, void prevention, and environmental protection. By making the encapsulation layer multi-functional, the patent eliminates the need for additional protective components that would create voids and increase device volume, thus resolving the contradiction between protection and space utilization.
4Reliability
If encapsulation layer is allowed to flow completely between packages, then voids are eliminated, but manufacturing complexity increases
Solution Approach 1:
The patent optimizes the rheological parameters of the encapsulation layer material, specifically its viscosity and flow characteristics, to enable complete gap filling during the encapsulation process. By carefully controlling these material parameters and the encapsulation process conditions, the invention achieves void-free integration without requiring complex manufacturing steps, thus eliminating voids while maintaining manufacturing feasibility.
Data Source
Figure 1
Figure 2
Figure 3
AI summary
An integrated device that includes a printed circuit board (PCB) and a package on package (PoP) device coupled to the printed circuit board (PCB). The package on package (PoP) device includes a first package that includes a first electronic package component (e.g., first die) and a second package coupled to the first package. The integrated device includes a first encapsulation layer formed between the first package and the second package. The integrated device includes a second encapsulation layer that at least partially encapsulates the package on package (PoP) device. The integrated device is configured to provide cellular functionality, wireless fidelity functionality and Bluetooth functionality. In some implementations, the first encapsulation layer is separate from the second encapsulation layer. In some implementations, the second encapsulation layer includes the first encapsulation layer. The package on package (PoP) device includes a gap controller located between the first package and the second package.