POP Semiconductor Package Cavity Channels for Thin Interconnects

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Solution Overview

Problem

In the semiconductor packaging field, there is a need to minimize the thickness of package-on-package (POP) structures while maintaining electrical connectivity and ensuring efficient encapsulation processes.

Innovation Solution

The semiconductor package design includes a lower substrate with a wiring layer, a semiconductor chip connected to the wiring layer, an upper substrate with protruding structures that define a cavity and channel regions, a connection structure between the substrates, and an encapsulant that fills the space between the substrates, ensuring electrical connectivity and reduced thickness.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If a conventional package-on-package structure is used, then electrical connectivity between substrates is achieved, but the overall thickness of the package is increased

Engineering Contradiction:
Improvepackage thicknessVSAvoidelectrical connectivity
Core Design Contradiction:
Length of stationary objectVSReliability

Solution Approach 1:

The patent introduces protruding structures that extend vertically from the lower substrate surface, creating a three-dimensional arrangement where connection structures can be positioned in the vertical dimension rather than only in the horizontal plane. This dimensional change allows electrical connectivity to be maintained while reducing the horizontal footprint and overall package thickness.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The connection structures are nested within the protruding structures, with the connection structures positioned inside or along the vertical extent of the protruding structures. This nesting arrangement allows multiple functional elements (protruding structures for support/alignment and connection structures for electrical connectivity) to occupy the same spatial envelope, thereby minimizing the overall package thickness.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Length of stationary object

If the package thickness is minimized, then the overall size is reduced, but the complexity of ensuring proper electrical connectivity increases

Engineering Contradiction:
Improvepackage thicknessVSAvoidconnection structure arrangement
Core Design Contradiction:
Length of stationary objectVSDevice complexity

Solution Approach 1:

The protruding structures serve multiple functions simultaneously: they provide mechanical support for the upper substrate, establish alignment references for precise positioning, and serve as carriers or pathways for the connection structures. This multi-functionality reduces the need for separate dedicated components, thereby simplifying the overall device complexity while maintaining minimized thickness.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The protruding structures are strategically positioned at specific locations where electrical connectivity is required, rather than uniformly distributed. This localized arrangement optimizes the connection structure placement exactly where needed, reducing unnecessary complexity in regions where connectivity is not required, while maintaining proper electrical connections at critical interfaces.

Inventive Principle:
Principle #3Local quality

3Length of stationary object

If protruding structures are added to the lower substrate, then the package thickness is reduced, but the manufacturing complexity increases

Engineering Contradiction:
Improvepackage thicknessVSAvoidsubstrate fabrication
Core Design Contradiction:
Length of stationary objectVSEase of manufacture

Solution Approach 1:

The protruding structures and connection structures are integrated into a unified manufacturing process sequence. The protruding structures are formed first as preparatory features, and then the connection structures are added in subsequent steps that build upon this foundation. This merging of features into a coordinated fabrication sequence, rather than treating them as separate add-on components, reduces overall manufacturing complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12288743B2Semiconductor package
Publication Date: 2025.04.29 SAMSUNG ELECTRONICS CO LTD
  • US12288743B2 patent drawing
  • US12288743B2 patent drawing
  • US12288743B2 patent drawing

AI summary

A semiconductor package includes a lower substrate that includes a lower wiring layer; a semiconductor chip disposed on the lower substrate, and an upper substrate disposed on the semiconductor chip. The upper substrate includes a lower surface that faces the semiconductor chip, an upper wiring layer, and a plurality of protruding structures disposed below the lower surface. The lower surface of the upper substrate includes a cavity region that overlaps the semiconductor chip in a first direction, and a plurality of channel regions that extend from the cavity region to an edge of the upper substrate. The cavity region and the plurality of channel regions are defined by the plurality of protruding structures.