PoP Semiconductor Package Trenches for Fine-Pitch Reliable Stacking
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Solution Overview
Problem
Current semiconductor packages with a package on package (PoP) structure face challenges in achieving a fine pitch between substrates, leading to increased height and reliability issues due to defects like short circuits, solder deformation, and non-wetting during stacking and sealing processes.
Innovation Solution
The implementation of a semiconductor package design featuring trenches in the substrates to accommodate the semiconductor chip and a gap filler made of a different material than the epoxy molding compound, which reduces the total package height and enhances reliability by preventing defects in the connection members.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of stationary object
If a fine pitch between package substrates is implemented, then the total package height is reduced, but reliability deteriorates due to defects like short circuits and solder deformation
Solution Approach 1:
The gap filler is divided into multiple segments: a first gap filler with a first material filling a first gap between adjacent connection members, and a second gap filler with a second material filling a second gap between the first package substrate and the second package substrate. This segmentation allows different materials to address different reliability concerns at different locations, enabling fine pitch implementation while maintaining reliability.
Solution Approach 2:
Different materials are used for different gap filling purposes: the first gap filler material is selected for preventing short circuits between connection members, while the second gap filler material is selected for preventing non-wetting between substrates. This local quality approach optimizes the properties of each gap filler for its specific function, allowing fine pitch implementation without compromising reliability.
2Area of stationary object
If connection members are disposed at a fine pitch, then the package is miniaturized, but manufacturing precision deteriorates due to solder deformation and non-wetting
Solution Approach 1:
The gaps are filled with gap fillers before the stacking and sealing processes. This preliminary action prevents solder deformation and non-wetting during subsequent manufacturing steps, enabling fine pitch connection member placement while maintaining manufacturing precision.
Solution Approach 2:
The gap fillers act as intermediary materials between the connection members and the package substrates. They provide mechanical support and prevent defects during the stacking process, enabling fine pitch implementation while maintaining manufacturing precision.
3Length of stationary object
If the package substrates are stacked closely, then the package is made compact, but reliability deteriorates due to short circuits and non-wetting defects
Solution Approach 1:
The gap fillers serve as intermediary materials that maintain appropriate spacing and prevent defects. The first gap filler prevents short circuits between connection members, while the second gap filler prevents non-wetting between substrates, enabling compact stacking while maintaining electrical connection reliability.
Solution Approach 2:
The invention uses composite gap filling with two different materials: a first gap filler material for preventing short circuits and a second gap filler material for preventing non-wetting. This composite approach addresses multiple reliability concerns simultaneously, enabling compact package design while maintaining electrical connection reliability.
Data Source
AI summary
A semiconductor device having a package on package (PoP) structure, in which a fine pitch between package substrates is implemented, a total height of a package is reduced, and reliability is enhanced. The semiconductor package includes a first package substrate including a first body layer and a first passivation layer, a first semiconductor chip on the first package substrate, a second package substrate on the first package substrate, the second package substrate including a second body layer and a second passivation layer, a first connection member on the first package substrate outside the first semiconductor chip, and a gap filler filled between the first package substrate and the second package substrate, wherein the first package substrate includes a first trench, the second package substrate includes a second trench, and the first semiconductor chip is disposed between the first trench and the second trench.


