PoP Package Structure With TIVs to Limit Delamination Stress
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Solution Overview
Problem
Current semiconductor packaging technologies face challenges in efficiently connecting and integrating multiple semiconductor dies within a package structure, particularly in achieving reliable electrical connections and minimizing delamination stresses in Package-on-Package (PoP) configurations.
Innovation Solution
The method involves using through insulator vias (TIVs) encapsulated in an insulating material, with a debond layer and redistribution layers for die attachment, followed by planarization and the formation of solder joints between packages, ensuring electrical connectivity and stress management through misaligned interfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If through insulator vias are used for electrical connection between packages, then electrical connectivity is improved, but delamination stress increases due to interface misalignment
Solution Approach 1:
A debond layer is introduced as an intermediary between the first package and second package to manage delamination stress. This layer absorbs and distributes the stress caused by interface misalignment between through insulator vias and conductive pads, preventing direct stress transmission that would cause delamination while maintaining electrical connectivity through the vias.
Solution Approach 2:
The patent modifies the physical and chemical parameters of the interface region by introducing a debond layer with specific material properties. This layer has controlled adhesion characteristics that allow it to accommodate misalignment stress, changing the stress distribution parameters at the package interface to prevent delamination while maintaining via connectivity.
2Adaptability or versatility
If multiple semiconductor dies are integrated in PoP configuration, then device functionality is improved, but manufacturing complexity increases
Solution Approach 1:
The package structure is segmented into distinct functional layers including first package, second package, debond layer, and through insulator vias. This segmentation allows each component to be optimized independently for its specific function while simplifying the overall manufacturing process by breaking down the complex PoP integration into manageable stages.
Solution Approach 2:
The debond layer serves as a mediator that simplifies manufacturing by providing a stress-management interface between packages. This intermediary layer accommodates alignment tolerances and reduces the precision requirements for via-to-pad alignment, thereby reducing manufacturing complexity while enabling multi-die integration.
3Reliability
If solder joints are formed between packages, then electrical connection is improved, but delamination risk increases at the package interface
Solution Approach 1:
The debond layer is positioned beforehand at the package interface to cushion and absorb delamination stress before it can propagate. This pre-positioned stress management layer protects the interface during solder joint formation and subsequent thermal cycling, reducing delamination risk while maintaining the electrical connection provided by solder joints.
Solution Approach 2:
The debond layer acts as an intermediary between the packages and solder joints, absorbing the stress generated during soldering and thermal operations. This mediator prevents direct stress transmission to the package interfaces, thereby reducing delamination risk while allowing solder joints to maintain electrical connection.
Data Source
AI summary
A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.