Package-on-Package Substrate Recess Anti-Mold Flash Feature

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Solution Overview

Problem

Current multi-chip packages face challenges in achieving high integrated circuit density, reliability, and cost-effectiveness due to limitations in testing individual integrated circuits before assembly, potential damage during assembly, and contamination issues during encapsulation, leading to assembly defects and increased costs.

Innovation Solution

An integrated circuit package-on-package system is developed, featuring a mountable substrate with a recess and anti-mold flash features that partially expose the substrate, allowing for reliable electrical and mechanical attachments while preventing contamination, and enabling individual testing of integrated circuits before assembly.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional multi-chip packages are assembled before testing, then integrated circuit density is improved, but assembly process yield and reliability deteriorate due to inability to identify known-good-die

Engineering Contradiction:
Improveintegrated circuit densityVSAvoidassembly process yield
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent performs testing of individual integrated circuits before they are assembled into the multi-chip package. This preliminary testing action allows identification of known-good-die (KGD) prior to assembly, ensuring that only tested and verified circuits are mounted on the substrate, thereby improving assembly yield and reliability while maintaining high circuit density

Inventive Principle:
Principle #10Preliminary action

2Quantity of substance

If vertically stacked integrated circuits are assembled, then integrated circuit density is improved, but testing and identification of failure modes becomes more difficult

Engineering Contradiction:
Improveintegrated circuit densityVSAvoidfailure mode identification
Core Design Contradiction:
Quantity of substanceVSDifficulty of detecting and measuring

Solution Approach 1:

The patent segments the testing process from the assembly process by testing individual integrated circuits separately before mounting them vertically on the substrate. This segmentation allows each circuit to be tested and characterized independently, making failure mode identification straightforward even in vertically stacked configurations where circuits are densely packed

Inventive Principle:
Principle #1Segmentation

3Reliability

If encapsulation process is performed, then integrated circuits are protected, but mold flash or bleed contamination impedes reliable attachments

Engineering Contradiction:
Improveprotection of integrated circuitsVSAvoidmold flash contamination
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent extracts or removes the harmful mold flash contamination from the assembly area by carefully controlling the encapsulation process to prevent flash from reaching the attachment regions. The encapsulation is performed in a way that isolates the integrated circuits for protection while preventing the generation of harmful flash that would impede subsequent attachment operations

Inventive Principle:
Principle #2Taking out (Extraction)

4Quantity of substance

If substrate and integrated circuit are damaged during assembly or testing, then manufacturing complexity increases, but integrated circuit density benefit is lost

Engineering Contradiction:
Improveintegrated circuit densityVSAvoidmanufacturing process complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent performs preliminary testing of individual integrated circuits before assembly to identify known-good-die, ensuring that only verified circuits are mounted. This preliminary action prevents damage to substrates and circuits during assembly by avoiding the mounting of defective components, thereby maintaining high circuit density without increasing manufacturing complexity

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7566966B2Integrated circuit package-on-package system with anti-mold flash feature
Publication Date: 2009.07.28 STATS CHIPPAC LTD
  • US7566966B2 patent drawing
  • US7566966B2 patent drawing
  • US7566966B2 patent drawing

AI summary

An integrated circuit package-on-package system includes: mounting an integrated circuit package system having a mountable substrate over a package substrate; forming a package encapsulation having both a recess and an anti-mold flash feature over the package substrate and the integrated circuit package system including: forming the anti-mold flash feature having an extension width at the bottom of the recess, and partially exposing the mountable substrate in the recess with the anti-mold flash feature over mountable substrate; and mounting an integrated circuit device over the mountable substrate in the recess.