Automated Package-on-Package Semiconductor Testing Apparatus

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Solution Overview

Problem

The existing manual testing process for package-on-package semiconductor devices is inefficient and prone to errors, leading to reduced accuracy and increased costs due to the complexity of aligning and testing both the top and bottom chips.

Innovation Solution

An automated testing apparatus comprising a main controller, pick and place device, test socket, lifting and rotating arm, and chip placement module, which allows for precise alignment and electrical connection of chips using a suction head and position sensor to enhance testing efficiency and accuracy.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If manual alignment and testing of chips is performed, then operation flexibility is maintained, but test accuracy decreases and human error increases

Engineering Contradiction:
Improvetest accuracyVSAvoidmanual operation
Core Design Contradiction:
Measurement precisionVSExtent of automation

Solution Approach 1:

The patent replaces manual mechanical alignment operations with an automated pick and place device that uses vision systems and precision positioning mechanisms. This substitution eliminates human error in alignment while maintaining the ability to perform complex positioning tasks, directly resolving the contradiction between manual flexibility and automated precision.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The testing system performs self-alignment and self-testing through automated coordinate mapping between the test socket and chip substrate. The system automatically identifies chip positions, maps coordinates, and executes testing without human intervention, achieving both high accuracy and operational autonomy.

Inventive Principle:
Principle #25Self-service

2Productivity

If manual testing process is used, then device complexity is reduced, but productivity decreases and test efficiency is limited

Engineering Contradiction:
Improvetest efficiencyVSAvoidtesting system complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The testing system is divided into distinct functional modules: a pick and place device for chip handling, a test socket for electrical connection, a lifting and rotating arm for positioning, and a controller for coordination. This segmentation allows each module to be optimized independently while working together to achieve high throughput testing, resolving the contradiction between complexity and productivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The pick and place device serves multiple functions: picking up chips from the test socket, placing them on the substrate, and performing alignment operations. The lifting and rotating arm provides both vertical movement and rotational positioning. This multi-functionality reduces the need for separate dedicated devices, managing system complexity while maintaining high productivity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Manufacturing precision

If eye estimation alignment method is used, then equipment cost is reduced, but manufacturing precision decreases

Engineering Contradiction:
Improvealignment precisionVSAvoidalignment system complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent replaces visual estimation with an automated vision-based alignment system integrated into the pick and place device. This system uses cameras and image processing to precisely locate chip positions and calculate coordinates, achieving high manufacturing precision without requiring complex manual measurement tools.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The system creates a digital copy or map of the physical chip positions by capturing images and calculating coordinates. This coordinate mapping allows the system to reference and reproduce precise positions electronically, achieving high alignment accuracy through information copying rather than physical measurement tools.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The apparatus significantly improves the accuracy and efficiency of testing package-on-package semiconductor devices by enabling automatic alignment and electrical connection of chips, reducing production costs and minimizing human error.

Implementation Method 1

the bottom surface of the pick and place device is provided with a suction head; the main controller is configured to control the chip placement module to move to the position between the pick and place device and the test socket so as to join the bottom surface of the pick and place device and control the suction head to suck the second chip

Methodology Applied
Scientific EffectSuction: Suction

Data Source

PatentUS9519024B2Apparatus for testing package-on-package semiconductor device and method for testing the same
Publication Date: 2016.12.13 CHROMA ATE INC
  • US9519024B2 patent drawing
  • US9519024B2 patent drawing
  • US9519024B2 patent drawing

AI summary

An apparatus for testing a package-on-package semiconductor device comprises a pick and place device for loading a first chip into or unloading the first chip from a test socket and a lifting and rotating arm for moving a chip placement module which receives a second chip to a position between the pick and place device and the test socket. The pick and place device and the chip placement module are lowered, and then a test process is performed. After the test process is completed, the pick and place device and the chip placement module are lifted, and the lifting and rotating arm moves the chip placement module to one side of the pick and place device. Accordingly, a method for testing the semiconductor device could be performed automatically so as to greatly enhance test efficiency and accuracy and to significantly reduce costs.