Power-on Reset Circuit With Dynamic Current Mirror Control
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Solution Overview
Problem
Power-on reset (POR) circuits are vulnerable to power supply fluctuations, leading to erroneous operations and high static current consumption, which increases power consumption and can result in incorrect resetting of sequential logic circuits.
Innovation Solution
A POR circuit design that includes a capacitor and current mirrors to manage power supply voltage changes, blocking current mirroring and turning off transistors when the voltage reaches a normal reference, along with an under-voltage lockout (UVLO) circuit that generates a reset signal based on a comparison between the power supply voltage and a reference voltage, preventing erroneous operations and reducing power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a power-on reset circuit is designed to reset sequential logic circuits when power supply voltage reaches reference voltage, then power-on reset function is achieved, but the circuit is vulnerable to power supply fluctuations causing erroneous operations and high static current consumption
Solution Approach 1:
The patent implements dynamic control of the POR circuit by introducing a control signal that dynamically enables or disables the current mirror operation based on power supply status. The control signal dynamically adjusts the threshold voltage of the third transistor, allowing the circuit to adapt its sensitivity to power supply changes, thereby preventing erroneous operations while maintaining reliable reset functionality.
Solution Approach 2:
The patent introduces a control signal as an intermediary element that mediates between the power supply voltage and the POR circuit operation. This control signal acts as a gatekeeper, selectively enabling current mirror operation only when appropriate, thus preventing direct harmful effects of power supply fluctuations on the POR circuit while maintaining the desired reset function.
2Temperature
If the power supply voltage is increased to ensure proper operation, then voltage headroom is improved, but static current of the POR circuit is increased thereby increasing power consumption
Solution Approach 1:
The patent implements periodic or conditional activation of the POR circuit through the control signal mechanism. Instead of continuous operation that would consume static current, the circuit is activated only during specific conditions (power-on state or reset required state), thereby dramatically reducing power consumption while maintaining adequate voltage headroom when needed.
Solution Approach 2:
The patent changes the operational parameters of the POR circuit by dynamically adjusting the threshold voltage through the control signal. This parameter change allows the circuit to operate efficiently at lower voltages when power saving is needed, while still providing sufficient voltage headroom for proper operation when the control signal enables the circuit.
Data Source
AI summary
An UVLO circuit according to an aspect of the present invention includes: a power-on reset (POR) circuit generating an output based on a first current that flows according to an increase of a power supply voltage and not operating in a normal state of the power supply voltage; and a logic operation unit generating a reset signal according to an output of the POR circuit and an output based on a result of comparison between a sense voltage that corresponds to the power supply voltage and a predetermined reference voltage.