POR Circuit With Latched Reset and Zero Steady-State Current
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Solution Overview
Problem
Existing Power-On-Reset (POR) circuits in systems on chips (SoCs) face challenges in achieving low power consumption, stable pull-up voltage, and zero steady-state current consumption, particularly in wireless sensor network node chips that require continuous operation for extended periods.
Innovation Solution
A POR circuit design comprising a power switch, band-gap comparator circuit, current comparator circuit, state latch circuit, brown out detector, and output buffer circuit, utilizing specific transistors and resistors to control power consumption and voltage detection, ensuring stable operation and zero steady-state current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a simple RC charge/discharge POR circuit is used, then the structure is simple, but the pull-up voltage is unstable and large capacitors are difficult to realize inside chips
Solution Approach 1:
The patent introduces a band-gap reference circuit as an intermediary to generate a stable reference voltage that is independent of process, temperature, and voltage variations. This reference voltage serves as a mediator to stabilize the pull-up voltage in the POR circuit, resolving the instability issue of simple RC circuits while maintaining reasonable complexity through integrated circuit techniques.
Solution Approach 2:
The patent changes the operating parameters by using a band-gap reference voltage (typically around 1.2V) that is specifically designed to be stable across temperature and process variations. This parameter change enables stable pull-up voltage generation without requiring large external capacitors, as the stability is achieved through the intrinsic properties of the band-gap reference circuit rather than external passive components.
2Reliability
If the POR circuit is always connected to the power supply to provide reset signals, then the system can start up from a deterministic state, but the steady-state power consumption becomes high
Solution Approach 1:
The patent implements periodic action by using a latch circuit that captures the reset signal state and maintains it without requiring continuous power consumption. The POR circuit operates actively only during power-up transitions, then latches the state and consumes minimal steady-state power, while still providing reliable reset functionality when needed.
Solution Approach 2:
The patent employs self-service through the latch circuit that automatically maintains the reset state without continuous external control. Once the POR circuit detects the power-up condition and generates the reset signal, the latch circuit self-maintains this state, eliminating the need for continuous power supply connection and reducing steady-state power consumption to near-zero levels.
3Duration of action of stationary object
If wireless sensor network node chips operate continuously for months or years in standby or sleep mode, then the operational duration is extended, but the requirement for steady-state power consumption becomes very rigorous
Solution Approach 1:
The patent ensures continuity of useful action by implementing a POR circuit with near-zero steady-state power consumption that remains functional throughout the extended operational duration. The latch circuit maintains the reset state continuously without consuming significant power, enabling the wireless sensor node to operate for months or years while meeting rigorous steady-state power consumption requirements.
Data Source
AI summary
The present invention discloses a Power-On-Reset (POR) circuit with zero steady-state current consumption and stable pull-up voltage. The POR circuit achieves zero steady-state current consumption during steady operation after the POR process by cutting off a power supply to a band-gap comparator circuit and a current comparator circuit after the POR process. The present invention has high reliability and stable pull-up voltage, is less susceptible to the impact of power-on rate of power supply, temperature, and process variation, has very low steady-state power consumption, and can be integrated in a SOC chip in low-power consumption applications.