POR Sequencer Booting Embedded Systems

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Solution Overview

Problem

Conventional embedded systems require significant nonvolatile memory for booting and lack the ability to self-check the integrity of boot code, and configuration registers may not be initialized before CPU execution.

Innovation Solution

A Power-On Reset Sequencer (POR Sequencer) mechanism that uses a POR Sequencer Descriptor stored in nonvolatile memory to initialize configuration registers and verify data integrity, allowing the system to boot with minimal nonvolatile memory and ensuring proper initialization before CPU reset.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional embedded systems use nonvolatile memory to store boot firmware, then the system can initialize and execute code, but the nonvolatile memory size increases and complexity rises

Engineering Contradiction:
Improvesystem initialization reliabilityVSAvoidnonvolatile memory size
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent divides the boot process into two separate components: a minimal boot loader stored in nonvolatile memory and the main operating system stored in external mass storage. This segmentation allows the nonvolatile memory to contain only essential initialization code, dramatically reducing its size requirement while maintaining reliable system startup capability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements preliminary action by having the boot loader perform essential initialization tasks and load the operating system into RAM before the main CPU begins execution. This preliminary setup in nonvolatile memory enables the system to bootstrap itself with minimal stored code, reducing memory size while ensuring reliable initialization.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If a small boot code loader is used in nonvolatile memory, then memory size is reduced, but the boot code cannot self-check its integrity

Engineering Contradiction:
Improvenonvolatile memory sizeVSAvoidboot code integrity verification
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The patent introduces an intermediary integrity check mechanism where the boot loader verifies its own integrity using a checksum or hash algorithm stored alongside it in nonvolatile memory. This self-verification capability is embedded in the minimal boot code, allowing it to detect corruption without requiring additional verification hardware or larger memory capacity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The boot loader is designed to be self-sufficient by including built-in integrity verification routines that automatically check its own code integrity upon execution. This self-service capability ensures reliable boot operation with minimal code, as the verification logic is integrated directly into the small boot loader rather than requiring separate verification mechanisms.

Inventive Principle:
Principle #25Self-service

3Reliability

If configuration registers are initialized before CPU reset, then proper system state is established, but additional control logic is required

Engineering Contradiction:
Improveconfiguration register initializationVSAvoidcontrol logic for initialization sequencing
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the configuration register initialization logic from the main CPU execution flow and places it in the boot loader code stored in nonvolatile memory. This separation allows register initialization to occur automatically during the boot process before CPU reset, establishing proper system state without requiring complex control logic in the CPU or additional initialization controllers.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS10120694B2Embedded system boot from a storage device
Publication Date: 2018.11.06 BITMICRO LLC
  • US10120694B2 patent drawing
  • US10120694B2 patent drawing
  • US10120694B2 patent drawing

AI summary

A mechanism of booting up a system directly from a storage device and a means of initializing an embedded system prior to activating a CPU is presented. The said system is comprised of one or more CPUs, a reset controller, a storage device controller, one or more direct memory access controllers, a RAM and its controller, a ROM and its controller, a debug interface and a power-on reset (POR) sequencer. The POR sequencer controls the overall boot process of the embedded system. Said sequencer uses descriptors (POR Sequencer descriptors) which are used to update the configuration registers of the system and to enable CPU-independent data transfers with the use of DMA controllers.Using a minimal amount of non-volatile memory for booting up a system brings down costs associated with increased silicon real estate area and power consumption. Capability of pre-initializing the system even before a CPU is brought out of reset provides flexibility and system robustness. Through the use of the Power-On Reset Sequencer module, integrity of program code and user data used in the boot up process can be verified thus providing a resilient boot up sequence.The present invention provides a mechanism for booting up a system using a minimum amount of nonvolatile memory. This method also enables the embedded system to initialize all configuration registers even before any of the CPUs of the system is brought out of reset. The embedded system consists of multiple controller chips or a single controller chip. The embedded system can have a single or multiple central processing units.