POR Threshold Test Circuit Using Existing IC Pins
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Solution Overview
Problem
Testing the power-on reset (POR) signal in integrated circuits is challenging due to potential interference with the logic core during testing, limitations of current consumption and indirect measurement methods, and the lack of available space for additional pins.
Innovation Solution
A testing circuit that indirectly tests the POR signal by evaluating POR-related signals through a switch-controlled resistor network connected to existing UVLO and OVLO pins, using decoders to set resistances indicative of the POR signal's status based on regulator, reference voltage, and clock signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Difficulty of detecting and measuring
If test modes are used to test the POR signal, then testing capability is provided, but the POR signal cannot be tested because it resets the logic core that executes the test mode
Solution Approach 1:
The patent introduces an intermediary testing circuit that indirectly measures the POR signal status by monitoring related signals (regulator status, reference voltage stability, clock frequency) rather than directly testing the POR signal itself. This intermediary approach allows testing without triggering the reset condition that would prevent test execution.
2Difficulty of detecting and measuring
If additional pins are added to the IC for POR signal testing, then testing capability is improved, but IC space is consumed
Solution Approach 1:
The patent makes existing pins (UVLO and OVLO pins) serve dual functions: their original voltage protection functions and additional POR signal testing functions. By configuring the resistor network to connect to these existing pins, the invention enables POR testing without requiring additional dedicated test pins.
3Measurement precision
If the POR signal is directly tested, then accurate POR status detection is achieved, but interference with the POR signal generator and logic core reset functionality occurs
Solution Approach 1:
The testing circuit uses intermediary measurements of related signals (regulator output voltages, reference voltage stability, clock frequency) to infer POR signal status indirectly. This intermediary measurement approach achieves accurate POR status detection without directly interfering with the POR signal generator or disrupting the logic core reset functionality.
4Difficulty of detecting and measuring
If current consumption methods are used to test POR signal generation, then indirect testing is enabled, but testing efficiency is reduced due to time-consuming measurements
Solution Approach 1:
The patent pre-configures a resistor network with multiple resistors that can be selectively connected to ground through switches controlled by test mode signals. This preliminary setup allows the testing circuit to quickly switch between different resistance states and immediately provide measurable voltage dividers, eliminating the need for time-consuming current consumption measurements while maintaining indirect testing capability.
Data Source
AI summary
Disclosed herein is a testing circuit for indirectly testing generation of a power-on-reset signal within an integrated circuit (IC). The testing circuit includes a switch configured to selectively disconnect an internal circuit from a test pin of the IC in response to start-up of the IC, a plurality of resistors connected between the test pin and a respective plurality of switches that are configured to selectively connect ones of the plurality of resistors to ground in response to corresponding control signals, and a control circuit configured to produce, at the test pin, a resistance indicative of status of generation of the POR signal by selectively operating the plurality of switches based upon statuses of a plurality of signals from which the POR signal is generated.