Conductive Buffer Layers for Recess-Tolerant Die Interconnects

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Solution Overview

Problem

Existing semiconductor packages face challenges with increased height and signal propagation delays due to bond wires, especially in stacked die configurations like shingle stacking and zig-zag patterns, which also impose strict requirements on recess depth control for conductive pads during hybrid bonding processes.

Innovation Solution

The introduction of conductive buffer layers, which are porous and include conductive particles, disposed between conductive pads before hybrid bonding. These buffer layers are flexible and deform under pressure, allowing for wider tolerable limits in recess depth variations and providing an electrically conductive medium even if conductive pads do not physically connect.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bond wires are used to connect semiconductor dies in stacked configurations, then electrical connectivity between dies is achieved, but the overall package height increases and signal propagation delays are introduced

Engineering Contradiction:
Improveelectrical connectivityVSAvoidpackage height
Core Design Contradiction:
ReliabilityVSLength of stationary object

Solution Approach 1:

The patent removes bond wires from the interconnect structure entirely, replacing them with direct die-to-die bonding. This extraction eliminates the additional height and signal delays that bond wires would introduce, while maintaining electrical connectivity through direct conductive paths between corresponding bond pads on adjacent dies.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent merges the bonding process with the die stacking process itself, creating a unified structure where dies are directly bonded to each other without intermediate bond wires. This merging eliminates the need for separate wire bonding steps and reduces the overall package height by consolidating the interconnect function into the die bonding interface.

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If shingle stacking or zig-zag patterns are used to arrange semiconductor dies, then space utilization is improved and bond pad accessibility is enhanced, but the package height increases

Engineering Contradiction:
Improvespace utilizationVSAvoidpackage height
Core Design Contradiction:
Area of stationary objectVSLength of stationary object

Solution Approach 1:

The patent segments the bonding process into multiple stages, allowing dies to be stacked in complex patterns like shingle stacking or zig-zag arrangements. By enabling direct bonding at each stage without requiring bond wires, the design achieves improved space utilization while controlling package height through efficient die-to-die contact interfaces.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces conductive buffer layers as intermediaries between bond pads in stacked configurations. These buffer layers facilitate direct electrical connection between dies in complex stacking patterns, enabling space-efficient arrangements without increasing package height, as the buffer layers are integrated within the bonding interface rather than extending outward.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If strict recess depth control is implemented for conductive pads during hybrid bonding, then bonding reliability is improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improvebonding reliabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent changes the physical state and properties of the bonding interface by introducing conductive buffer layers with specific electrical and mechanical characteristics. These buffer layers compensate for variations in recess depth, allowing broader manufacturing tolerances while maintaining bonding reliability, thus reducing manufacturing complexity without sacrificing quality.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent employs composite structures at the bonding interface, combining conductive pads with conductive buffer layers made of different materials properties. This composite approach creates a more robust bonding interface that is tolerant of recess depth variations, improving manufacturing ease while maintaining bonding reliability through the synergistic properties of the composite structure.

Inventive Principle:
Principle #40Composite materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The conductive buffer layers relax the stringent recess depth requirements, allowing for more aggressive targeting of recess amounts, thereby enhancing the yield and reliability of the direct bonding process while maintaining effective interconnects and reducing the overall height of semiconductor packages.

Implementation Method 1

the conductive buffer layer being malleable to deform in response to pressure applied to the conductive buffer layer

Methodology Applied
Scientific EffectElastic deformation: Elasticity

Implementation Method 2

providing an electrically conductive medium even if conductive pads do not physically connect

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Data Source

PatentUS12315833B2Conductive buffer layers for semiconductor die assemblies and associated systems and methods
Publication Date: 2025.05.27 MICRON TECHNOLOGY INC
  • US12315833B2 patent drawing
  • US12315833B2 patent drawing
  • US12315833B2 patent drawing

AI summary

Conductive buffer layers for semiconductor die assemblies, and associated systems and methods are disclosed. In an embodiment, a semiconductor die assembly includes first and second semiconductor dies directly bonded to each other. The first semiconductor die includes a first copper pad and the second semiconductor die includes a second copper pad. The first and second copper pads form an interconnect between the first and second semiconductor dies, and the interconnect includes a conductive buffer material between the first and second copper pads, where the conductive buffer material includes aggregates of conductive particles. In some embodiments, the first and second copper pads are not conjoined but electrically connected to each other through the conductive buffer material. In some embodiments, the conductive buffer material is porous such that the aggregates of conductive particles can be compressed together in response to the pressure applied to the conductive buffer layer.