Porous-Junction SCR Structure for Low Trigger Voltage
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional silicon controlled rectifier (SCR) devices have high trigger voltage and large footprint, limiting their high current performance and efficiency.
Innovation Solution
The introduction of a porous semiconductor region at the junction of N-well and P-well in the semiconductor substrate, combined with shallow trench isolation structures, reduces trigger voltage and increases holding current performance while minimizing device size.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If conventional SCR device structure is used, then device can conduct current in unidirectional mode, but trigger voltage is high and footprint is large
Solution Approach 1:
The patent introduces a porous semiconductor region at the junction of the p-well and n-well, which utilizes the unique properties of porous materials to reduce trigger voltage and enhance carrier injection efficiency, thereby resolving the contradiction between low trigger voltage and compact footprint
Solution Approach 2:
The patent modifies the physical and electrical parameters of the junction region by creating a porous structure with controlled porosity and doping characteristics, which changes the electrical field distribution and reduces the trigger voltage while maintaining a compact device structure
2Productivity
If conventional SCR device structure is used, then device maintains stability, but high current performance is limited
Solution Approach 1:
The porous semiconductor region enhances high current performance by improving carrier injection and transport efficiency through its unique structure, while the overall device stability is maintained through proper integration with the conventional p-n-p-n SCR architecture
Solution Approach 2:
The patent creates a composite structure combining conventional doped semiconductor regions with a porous semiconductor region, leveraging the advantages of both approaches to achieve high current performance while maintaining device stability through the p-n-p-n switching configuration
Data Source
Figure 1
Figure 2
Figure 3
AI summary
The present disclosure relates to semiconductor structures and, more particularly, to high performance silicon controlled rectifier (SCR) devices and methods of manufacture. The structure includes: a first well in a semiconductor substrate; a second well in the semiconductor substrate, adjacent to the first well; and a porous semiconductor region extending in the first well and the second well.