Porous Silicon Capacitor Structure for High Capacitance Density
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Solution Overview
Problem
Existing capacitors face limitations in increasing electrostatic capacitance, as the substrate's porosity does not effectively enhance surface areas without compromising strength.
Innovation Solution
A capacitor design featuring a silicon substrate with a porous part in the capacitance generation region, where a conductor layer fills the pores and a dielectric layer is applied between the pore surfaces, allowing for increased surface area without reducing substrate strength.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the substrate is made porous to increase surface area, then electrostatic capacitance is improved, but substrate strength deteriorates
Solution Approach 1:
The patent applies local quality by creating porous structures only in specific regions where capacitance enhancement is needed, while maintaining dense, strong substrate in other regions. The porous part is selectively formed in the capacitance generation region, allowing surface area expansion without compromising overall substrate strength.
Solution Approach 2:
The patent employs composite materials by combining porous silicon structures with conductor and dielectric layers. The porous silicon provides high surface area for capacitance, while the conductor and dielectric layers form a composite structure that maintains mechanical integrity and electrical functionality.
2Ease of manufacture
If conventional trench capacitor methods are used, then manufacturing is simplified, but electrostatic capacitance cannot be sufficiently increased
Solution Approach 1:
The patent utilizes porous materials by forming a porous part within the silicon substrate through anodization. This porous structure dramatically increases the surface area available for capacitance generation, enabling significantly higher electrostatic capacitance values compared to conventional trench capacitor approaches.
Solution Approach 2:
The patent transitions from two-dimensional surface capacitors to three-dimensional porous structures. By creating porous regions that extend into the substrate thickness direction, the effective surface area for capacitance is multiplied without increasing the device footprint, thereby achieving higher capacitance density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design significantly enhances electrostatic capacitance by increasing the surface area of electrodes while maintaining the strength of the silicon substrate.
Implementation Method 1
the silicon substrate has a porous part provided in a thickness direction in the capacitance generation region
Implementation Method 2
forming, by an anode oxidation process, a porous part in the capacitance generation region
Data Source
AI summary
A capacitor includes a silicon substrate, a conductor layer, and a dielectric layer. The silicon substrate has a principal surface including a capacitance generation region and a non-capacitance generation region. The silicon substrate has a porous part provided in a thickness direction in the capacitance generation region. The conductor layer has a surface layer part at least covering part of a surface of the capacitance generation region and a filling part filled in at least part of fine pores of the porous part. The dielectric layer is provided between an inner surface of the fine pores and the filling part.