Porous Silicon Passivation for Solar Cell Efficiency

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Solution Overview

Problem

Conventional silicon-based solar cells face efficiency losses due to recombination, series resistance, thermal, metal-semiconductor contact, and reflection losses, which are not adequately addressed by existing technologies.

Innovation Solution

The integration of porous silicon layers with tunable band gap energy and refractive index, created through stain etching or electrochemical processes, serves as a passivation and antireflection coating, reducing surface recombination, improving charge carrier lifetime, and enhancing light absorption by creating an electric field that suppresses minority carrier transport and reduces reflection losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional silicon-based solar cells are used, then manufacturing is simple and cost-effective, but surface recombination losses and reflection losses reduce efficiency

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidsurface recombination loss and reflection loss
Core Design Contradiction:
Ease of manufactureVSLoss of energy

Solution Approach 1:

The patent applies porous silicon layers with controlled porosity (30-70%) to create a passivation structure that reduces surface recombination. The porous structure provides high surface area for passivation while maintaining electrical isolation of minority carriers through electric field effects at the porous silicon interface

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent creates a composite structure combining crystalline silicon substrate with porous silicon layers, leveraging the beneficial properties of both materials - the crystalline silicon for charge generation and the porous silicon for surface passivation and light trapping

Inventive Principle:
Principle #40Composite materials

2Reliability

If porous silicon layers are added for passivation, then surface recombination is reduced and carrier lifetime is improved, but device structure and manufacturing process become more complex

Engineering Contradiction:
Improveminority carrier lifetimeVSAvoidstructure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The porous silicon layer performs multiple functions simultaneously: surface passivation to reduce recombination, light trapping to enhance absorption, and electrical isolation of minority carriers through band gap effects. This multi-functionality reduces the need for separate components

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent controls porosity parameters (30-70%) and layer thickness (5-50 nm) to optimize the balance between passivation effectiveness and structural complexity, achieving high carrier lifetime without excessive structural complexity

Inventive Principle:
Principle #35Parameter changes

3Use of energy by moving object

If porous silicon with high porosity is used, then light absorption is enhanced and reflection loss is reduced, but manufacturing precision requirements increase

Engineering Contradiction:
Improvelight absorption efficiencyVSAvoidporosity control precision
Core Design Contradiction:
Use of energy by moving objectVSManufacturing precision

Solution Approach 1:

The patent specifies porosity ranges (30-70%) and thickness ranges (5-50 nm) that provide optimal light absorption while being achievable with standard manufacturing tolerances, balancing performance with manufacturability

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The use of porous silicon layers in solar cells effectively reduces surface recombination, enhances minority charge carrier lifetime, and minimizes reflection losses, leading to improved efficiency and cost-effectiveness by leveraging existing semiconductor manufacturing processes.

Implementation Method 1

The silicon substrate has a first band gap energy, and the porous silicon region has a second band gap energy greater than the first band gap energy. The semiconductor system is configured to exhibit an electric field on the interface between the silicon substrate and the porous silicon region. The electric field is generated at least partially by a difference between the first band gap energy and the second band gap energy.

Methodology Applied
Scientific EffectBand gap energy difference:

Implementation Method 2

The porous silicon region is configured to passivate a surface of the silicon substrate via, at least partially, an electric force induced by the electric field on a minority charge carrier in the silicon substrate. The electric force is configured to be at a direction from the porous silicon region to the silicon substrate so as to suppress transport of minority charge carriers from the silicon substrate to the porous silicon region

Methodology Applied
Scientific EffectElectric field induced passivation: Electric Field

Implementation Method 3

Porous silicon is a form of silicon material that has holes (pores) in small scales. The pores in porous silicon can also display various morphologies, i.e. shape, orientation, alignment, and interconnection of pores, among others.

Methodology Applied
Scientific EffectPorosity: Porosity

Data Source

PatentUS10529872B2Silicon-containing semiconductor structures, methods of making the same and devices including the same
Publication Date: 2020.01.07 SPECMAT INC
  • US10529872B2 patent drawing
  • US10529872B2 patent drawing
  • US10529872B2 patent drawing

AI summary

A semiconductor system includes a silicon substrate and a porous silicon region disposed on the silicon substrate. The porous silicon region is configured to passivate the surface of the silicon substrate via a field effect and to reduce reflection loss on the silicon substrate via an appropriate refractive index. The porous silicon region is manufactured by a stain etching process, which retrofits existing tools for junction isolation and Phosphorus Silicon Glass (PSG) etch in solar cell manufacturing. The retrofitted tools for junction isolation and PSG etch achieves multiple purposes in a single step, including etch-back, PSG etch, antireflection coating, and passivation of the front surface of the solar cell.