Port-Sliced Crossbar Switch Arbitration
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Solution Overview
Problem
High port-count crossbar switches face challenges with deep buffers due to long off-chip communication latencies, leading to increased memory requirements and scalability issues, especially in multi-chip module (MCM) implementations.
Innovation Solution
The implementation of a port-sliced buffered crossbar switch with hop-by-hop multiplexing of crosspoint buffers and a distributed weighted round-robin arbitration technique, which reduces buffer depth and ensures fairness among flows, utilizing proximity communication for inter-chip connectivity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If crosspoint buffers are used to simplify arbitration and enable asynchronous operation, then ease of operation and reliability are improved, but buffer depth increases due to long off-chip communication latencies, leading to increased memory requirements and device cost
Solution Approach 1:
The patent segments the crossbar switch into multiple modules, each handling a subset of input and output ports. By dividing the overall switch fabric into smaller independent units, the buffer depth required in each module is reduced while maintaining the overall switching capacity. This segmentation allows asynchronous operation with manageable buffer sizes in each module.
Solution Approach 2:
The patent introduces a temporal dimension to the switching architecture by implementing multi-cycle arbitration and buffer management. Instead of requiring all buffers to be deeply stacked to handle simultaneous arrivals, the system uses time-multiplexed arbitration across multiple cycles, effectively trading time for space and reducing the required buffer depth.
2Reliability
If crosspoint buffer depth is increased to accommodate long off-chip communication delays, then reliability and non-blocking operation are maintained, but device cost and complexity increase significantly
Solution Approach 1:
The switch is divided into multiple independent modules, each with its own arbitration logic and buffer management. This segmentation reduces the complexity of controlling deeply stacked buffers by distributing the control functions across multiple simpler modules, each handling a subset of the total traffic.
Solution Approach 2:
The patent implements preliminary arbitration and buffer allocation decisions before data actually arrives at the crosspoint buffers. By pre-establishing buffer assignments and arbitration outcomes in advance, the system reduces the real-time complexity of buffer management and simplifies the control logic required to maintain non-blocking operation.
3Quantity of substance
If unbuffered crossbar arbitration is used to reduce memory requirements, then device cost is reduced, but arbitration becomes computationally costly and difficult to operate at high port counts
Solution Approach 1:
The patent segments the arbitration function into distributed arbiters located at each module, rather than using a single centralized arbiter for the entire high-port-count switch. This segmentation reduces the computational complexity of each individual arbiter while collectively handling the full switch capacity, making high port counts feasible without excessive memory requirements.
Data Source
AI summary
Embodiments of a circuit, a buffered crosspoint switch that includes the circuit and a computer system that includes the switch are described. In this circuit and switch, deep crosspoint buffers are replaced with smaller distributed buffers. This modification reduces the cost of the switch and improves the scaling properties of the architecture.