Portable Location Constraints for IC Design Portability
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Solution Overview
Problem
Conventional high-level modeling system (HLMS) tools for integrated circuit design lack portability and efficiency in translating high-level designs into low-level hardware implementations, requiring manual device-specific location constraints that limit design flexibility and portability.
Innovation Solution
A method that utilizes portable location constraints, allowing high-level modeling systems to generate low-level characterizations of circuit designs independently of specific devices, enabling efficient implementation across various hardware platforms by separating high-level behavior from low-level implementations and using a configuration bitstream to implement these constraints.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional HLMS tools use manual device-specific location constraints, then design implementation can be achieved, but design portability and flexibility deteriorate
Solution Approach 1:
The patent introduces portable location constraints as an intermediary representation that bridges high-level design and low-level implementation. These constraints are device-independent and can be automatically translated to device-specific constraints, eliminating the need for manual constraint management while maintaining design portability across different hardware platforms
Solution Approach 2:
The patent segments the constraint management process into two distinct layers: portable location constraints at the high-level design stage and device-specific location constraints at the implementation stage. This segmentation allows designers to work with abstract, portable constraints without being burdened by device-specific complexities
2Productivity
If manual device-specific constraints are used, then implementation is achieved, but synthesis and place-and-route runtime increases
Solution Approach 1:
The patent applies preliminary action by generating portable location constraints during the high-level design phase before synthesis and place-and-route operations. These pre-established constraints provide a structured framework that guides subsequent implementation steps, reducing the computational complexity and runtime of synthesis and place-and-route operations
3Adaptability or versatility
If high-level designs are tightly coupled to specific devices, then implementation precision is achieved, but design flexibility deteriorates
Solution Approach 1:
The patent implements dynamics by making the design representation adaptable across different device contexts. Portable location constraints maintain the essential spatial and temporal relationships of design elements while being flexible enough to map to different device architectures, achieving both design flexibility and implementation precision through dynamic adaptation rather than fixed coupling
Data Source
AI summary
An embodiment of a method for enabling a high level modeling system for implementing a circuit design in an integrated circuit device includes: receiving a high-level characterization of the circuit design; receiving a portable location constraint associated with elements of the circuit design; and generating, by a computer, a low-level characterization of the circuit design based upon the high-level characterization and the portable location constraint.