Post-Distortion Amplifier Linearization for IM3 Cancellation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing amplifiers suffer from reduced linearity due to nonlinear components generated during signal amplification, particularly third-order intermodulation signals that degrade performance.
Innovation Solution
The amplifier structure incorporates a post-distorter to minimize the influence of intermodulation components by adjusting bias voltages and transistor sizes to equalize the magnitude of third-order intermodulation currents across transistors, thereby improving linearity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If signal amplification is performed using conventional amplifier structures, then amplification gain is achieved, but third-order intermodulation distortion is generated that degrades linearity
Solution Approach 1:
The amplifier is segmented into multiple transistor stages (first transistor for amplification, second transistor for distortion compensation). By dividing the amplification function across separate transistor components with different bias conditions, the patent isolates the distortion-generating function from the main amplification path, allowing independent optimization of each stage to reduce overall intermodulation distortion while maintaining gain.
Solution Approach 2:
The patent converts the harmful third-order intermodulation distortion into a beneficial compensation mechanism. The second transistor is specifically biased to generate equal but opposite third-order intermodulation products that cancel the distortion generated by the first transistor. This transforms the harmful nonlinear effect into a useful distortion-canceling mechanism, improving linearity without sacrificing amplification gain.
2Manufacturing precision
If bias voltages and transistor sizes are adjusted to equalize third-order intermodulation currents, then linearity is improved, but device complexity increases
Solution Approach 1:
The patent applies parameter changes by specifically adjusting the bias voltages (V1, V2) and transistor size ratios (W1/L1, W2/L2) to achieve equal third-order intermodulation current magnitudes. By changing these electrical and geometric parameters, the patent creates a controlled condition where distortion products from different transistor stages balance each other, improving linearity through precise parameter optimization rather than complex circuit topologies.
Data Source
Figure 1~2
Figure 3
Figure 4
AI summary
A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. An amplifier includes a first transistor for amplifying the fundamental signal applied to a gate terminal. and a second transistor having a source terminal electrically connected to the drain terminal of the first transistor and a drain terminal electrically connected to a bias voltage. The current flowing through the second transistor may be determined based on the current flowing in the drain terminal of the first transistor.