Low-Voltage Post-Driver Calibration With ESD Isolation
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Solution Overview
Problem
In 2.5D and 3D integrated circuit packaging, the use of low voltage post-drivers to reduce heat and power consumption increases the risk of electrostatic discharge (ESD) damage due to direct current paths between the post-driver and the I/O pad.
Innovation Solution
A post-driver structure capable of low voltage operation and ESD protection is implemented, featuring a drive unit with replica pull-up and pull-down drivers, a current mirror circuit, and a calibration circuitry that adjusts impedance without a direct current path between the post-driver and the I/O pad, thereby preventing ESD damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a low voltage post-driver is used to reduce heat and power consumption, then energy efficiency is improved, but the risk of electrostatic discharge damage increases due to direct current paths
Solution Approach 1:
The patent introduces a calibration circuit as an intermediary between the post-driver and the pad. This calibration circuit includes a calibration pad, calibration transistor, and calibration resistor that create an indirect path for calibration current while preventing direct current paths during normal operation. The intermediary calibration circuit allows impedance calibration to occur without establishing harmful direct current paths that would expose the low-voltage post-driver to ESD damage.
Solution Approach 2:
The patent segments the circuit into distinct functional regions: the post-driver circuit operating at low voltage (VDDQ), the calibration circuit operating at higher voltage (VDD), and the pad structure. By separating the calibration function into its own dedicated circuitry with separate power domains, the patent allows calibration to occur without exposing the sensitive low-voltage post-driver to ESD risks associated with direct pad connections.
2Measurement precision
If a direct current path is provided between the post-driver and the I/O pad for calibration, then impedance calibration can be performed, but the post-driver becomes vulnerable to ESD damage
Solution Approach 1:
The calibration circuit serves as an intermediary structure that enables impedance calibration without creating direct current paths between the post-driver and pad during normal operation. The calibration transistor and calibration resistor provide a controlled indirect path that allows calibration measurements while isolating the post-driver from ESD exposure.
Solution Approach 2:
The patent employs dynamic control through the calibration transistor which can be selectively activated or deactivated. During calibration operations, the calibration transistor is activated to enable the calibration path; during normal operation, it is deactivated to prevent direct current paths and ESD exposure. This dynamic switching allows the system to adapt its connectivity based on operational requirements.
Data Source
AI summary
A post-driver with low voltage operation and electrostatic discharge protection is provided. A post-driver structure includes a drive unit including a pull-up driver and a pull-down driver, a pad connected to an external resistance, and an output node connected between the pull-up driver and the pull-down driver. The output node is configured to connect to a comparator for impedance calibration of the drive unit. The post-driver structure also includes an operational amplifier connected to a first transistor and the pad in a closed loop configuration. The operational amplifier is further connected to a second transistor to form a current mirror circuit between the operational amplifier and the drive unit. The current mirror circuit replicates a voltage at the pad with a voltage at the output node for the impedance calibration.