Low-Voltage Post-Driver Calibration With ESD-Isolated Pad

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In 2.5D and 3D integrated circuit packaging, low voltage post-drivers are prone to electrostatic discharge (ESD) damage due to direct current paths, which prevents them from operating at low voltages necessary for reducing heat and power consumption.

Innovation Solution

A post-driver structure with calibration circuitry that adjusts impedance using replica drivers and current mirror circuits, enabling low voltage operation while protecting against ESD through an indirect connection between the calibration pad and drive unit, allowing for impedance matching without direct current paths.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If a low voltage post-driver is used, then heat and power consumption are reduced, but the risk of ESD damage increases due to direct current paths

Engineering Contradiction:
Improvepower consumptionVSAvoidESD protection
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The patent introduces an intermediary calibration circuit between the post-driver and the external pad. This calibration circuit includes a calibration pad, calibration transistor, and calibration resistor that act as a mediator during calibration operations. The intermediary structure allows the post-driver to be calibrated for impedance matching without establishing a direct current path to external pads, thereby protecting the low-voltage post-driver from ESD damage while enabling proper signal transmission calibration

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent segments the calibration function from the main post-driver circuit by creating a separate calibration circuit with its own pad and transistor. This segmentation isolates the sensitive low-voltage post-driver core from direct exposure to external ESD events, allowing the calibration function to be performed safely through controlled transistor switching rather than direct pad connections

Inventive Principle:
Principle #1Segmentation

2Measurement precision

If impedance calibration is performed with direct pad connection, then signal quality is improved, but ESD damage risk increases

Engineering Contradiction:
Improveimpedance calibration accuracyVSAvoidESD exposure
Core Design Contradiction:
Measurement precisionVSObject-affected harmful factors

Solution Approach 1:

The calibration circuit uses a calibration transistor as an intermediary device that can be switched on/off to control the calibration path. During calibration, the transistor enables the measurement path through the calibration resistor, allowing accurate impedance measurement. When not in calibration mode, the transistor remains off, blocking any direct current path to external pads and protecting against ESD events

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11855613B2Post-driver with low voltage operation and electrostatic discharge protection
Publication Date: 2023.12.26 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11855613B2 patent drawing
  • US11855613B2 patent drawing
  • US11855613B2 patent drawing

AI summary

A post-driver with low voltage operation and electrostatic discharge protection. In one embodiment, a post-driver structure includes a drive unit including a pull-up driver and a pull-down driver, a pad connected to an external resistance, and an output node connected between the pull-up driver and the pull-down driver, the output node configured to connect to a comparator for impedance calibration of the drive unit. The post-driver structure also includes an operational amplifier connected to a first transistor and the pad in a closed loop configuration, the operational amplifier further connected to a second transistor to form a current mirror circuit between the operational amplifier and the drive unit, wherein the current mirror circuit replicates a voltage at the pad with a voltage at the output node for the impedance calibration.