Post Driver Gate Bias Shifting for Overdrive Voltage Reliability
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Solution Overview
Problem
Conventional overdrive designs for semiconductor chips, especially in multi-generation systems, face reliability issues due to excessive voltages that can damage transistors and require multiplexers, which further complicate the design.
Innovation Solution
A post driver with a pull-up and pull-down circuit, along with bias circuits using PMOS and NMOS transistors, that manage overdrive voltage by providing controlled voltage shifts to protect transistors within safe operational ranges, eliminating the need for multiplexers and ensuring reliable operation across different voltage generations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If overdrive voltage (2VDD+VX) is applied to new-generation chips, then compatibility with old-generation chips is improved, but transistor reliability deteriorates due to excessive voltage exceeding maximum ratings
Solution Approach 1:
The patent introduces a post driver circuit as an intermediary component between the overdrive voltage source and the transistor gates. This post driver includes pull-up and pull-down circuits with controlled voltage shifts that mediate the voltage transition, ensuring gate voltages never exceed safe limits while still enabling overdrive operation. The bias circuits act as voltage mediators, providing controlled voltage shifts (≈VX) to keep transistor voltages within safe regions.
Solution Approach 2:
The patent dynamically changes voltage parameters through bias circuits that provide controlled voltage shifts. The first bias circuit provides a voltage shift of approximately VX to the pull-up circuit gate, while the second bias circuit provides a voltage shift of approximately VX to the pull-down circuit gate. This parameter transformation allows the system to operate with overdrive voltage while maintaining transistor safety margins.
2Adaptability or versatility
If conventional overdrive design uses multiplexers to manage voltage, then voltage switching capability is improved, but device complexity and reliability issues worsen
Solution Approach 1:
The patent extracts and eliminates the multiplexer component from the overdrive design. Instead of using a multiplexer to switch between voltage levels, the invention uses dedicated pull-up and pull-down circuits with bias circuits that directly control voltage transitions. This removal of the multiplexer simplifies the circuit architecture while maintaining the necessary voltage switching capability through alternative means.
Solution Approach 2:
The patent segments the voltage control function into separate pull-up and pull-down circuits, each with dedicated bias circuits. Rather than using a single multiplexer to handle all voltage switching, the design divides the control into distinct functional blocks: pull-up circuit with first bias circuit for high-side control, and pull-down circuit with second bias circuit for low-side control. This segmentation improves reliability by isolating failure modes.
Data Source
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AI summary
A post driver and a chip with overdrive capability are shown. A first bias circuit (110) is configured to provide a first voltage shift between the output terminal of the post driver (OUT) and the gate terminal of the first p-channel metal-oxide-semiconductor (PMOS) transistor (P1) of a pull-up circuit (106) when the pull-down circuit (108) is enabled. A second bias circuit (112) is configured to provide a second voltage shift between the output terminal of the post driver and the gate terminal of the first n-channel metal-oxide-semiconductor (NMOS) transistor (N1) of the pull-down circuit (108) when the pull-up circuit is enabled. Accordingly, the PMOS transistors (P1, P2, P4) in the pull-up circuit and the NMOS transistors (N1, N2, N4) in the pull-down circuit are all well protected although they are powered by an overdrive voltage (2*VDD+VX).