Post-Emphasis Output Circuit for Signal Distortion Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In electronic devices, signal transmission often results in waveform distortion due to interference, leading to incorrect data transmission between components like processors and memory modules, especially when internal resistors and channel resistors are not perfectly matched.

Innovation Solution

An electronic circuit comprising a driver, delay circuit, and strength control circuit generates an emphasis signal by adjusting the amplitude of delayed signals to compensate for waveform distortion, ensuring accurate data transmission by adding emphasis components to the original signal in specific time intervals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If signals are transmitted simultaneously or concurrently within an information device, then information processing speed is improved, but interference is generated between signals causing waveform distortion

Engineering Contradiction:
Improveinformation processing speedVSAvoidsignal interference and waveform distortion
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The patent applies preliminary anti-action by generating an emphasis signal in advance that has the opposite polarity to the expected distortion. The distortion compensation circuit pre-calculates the distortion amount based on the input signal characteristics and generates a compensation signal with inverted polarity to counteract the anticipated waveform distortion before it occurs, thereby maintaining signal integrity during concurrent transmissions

Inventive Principle:
Principle #9Preliminary anti-action

Solution Approach 2:

The patent converts the harmful waveform distortion into a benefit by measuring the actual distortion characteristics and using them to generate a compensating emphasis signal. The distortion that would normally degrade signal quality is instead used as the basis for creating a correction signal that improves overall transmission accuracy, transforming the harmful interference effect into a useful compensation mechanism

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

2Speed

If the waveform of a signal is distorted during transmission, then signal transmission speed may be maintained, but information accuracy deteriorates

Engineering Contradiction:
Improvesignal transmission speedVSAvoidinformation accuracy
Core Design Contradiction:
SpeedVSLoss of information

Solution Approach 1:

The patent implements feedback by measuring the actual waveform distortion that occurs during signal transmission and using this measurement to adjust the emphasis signal generation. The distortion compensation circuit continuously monitors the signal characteristics, calculates the distortion amount, and generates compensating signals based on this feedback, thereby maintaining information accuracy while preserving transmission speed

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent applies parameter changes by dynamically adjusting the amplitude and timing parameters of the emphasis signal based on the measured distortion characteristics. The circuit modifies the signal parameters (amplitude, delay time) according to the actual transmission conditions and distortion level, enabling adaptive compensation that maintains both transmission speed and information accuracy under varying operating conditions

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10367490B2Electronic circuits for outputting post emphasis signals
Publication Date: 2019.07.30 SAMSUNG ELECTRONICS CO LTD
  • US10367490B2 patent drawing
  • US10367490B2 patent drawing
  • US10367490B2 patent drawing

AI summary

An electronic circuit may include a driver, a delay circuit, a strength control circuit, and an adder circuit. The driver may generate a second signal based on a first signal. The delay circuit may delay the first signal by as much as a reference time, to generate a third signal. The strength control circuit may adjust an amplitude of the third signal to generate a fourth signal. The adder circuit may add the second signal and the fourth signal to generate a fifth signal. In a first time interval determined based on the reference time, an amplitude of the fifth signal may be greater than an amplitude of the second signal. In a second time interval except for the first time interval, the amplitude of the fifth signal may be smaller than the amplitude of the second signal. In the second time interval, the amplitude of the fifth signal may be smaller than an amplitude of the first signal.