Post-Gate Fin Isolation Structure for Uninterrupted Gate Formation
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Solution Overview
Problem
The formation of semiconductor devices in integrated circuits is challenged by the presence of fin cut structures, which disrupt the deposition of gate structure materials, particularly in logic and memory cells, leading to difficulties in forming gate structures across multiple semiconductor devices.
Innovation Solution
The technique involves forming fin cut structures after the metal gate has been formed, allowing the gate structure to be completed first, then removing portions of the gate and semiconductor regions to create the fin cut structure, ensuring that the fin cut structure does not interfere with the gate structure formation and that conductive gate layers directly abut the fin cut structure without intervening dielectric layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If fin cut structures are formed before gate structure deposition, then fin isolation is achieved, but gate structure formation is disrupted
Solution Approach 1:
The gate structure is formed first as a preliminary action, establishing the gate electrode and gate dielectric layers before the fin cut structure is created. This preliminary gate formation allows subsequent fin isolation to occur without disrupting the already-formed gate structure, resolving the contradiction between achieving fin isolation and maintaining ease of gate structure formation
2Ease of manufacture
If fin cut structures are formed after gate structure deposition, then gate structure formation is enabled, but material deposition is disrupted
Solution Approach 1:
The structure is segmented into distinct regions: the gate structure extends over first fins, while the fin cut structure is formed in a separate region over second fins. This segmentation allows the gate structure to be formed continuously over active device regions without interruption, while still achieving isolation over specific fin regions through the fin cut structure
Data Source
AI summary
Techniques are provided herein to form fin cut structures, or fin isolation structures, after the metal gate has been formed. In an example, a row of semiconductor devices each include a semiconductor region extending in a first direction between a source region and a drain region, and a gate structure extending in a second direction over the semiconductor regions of each neighboring semiconductor device along the row. A fin cut structure that includes a dielectric material interrupts the gate structure and replaces the semiconductor region of one of the semiconductor devices, effectively cutting through the length of the semiconductor device fin (or nanoribbons). The gate structure is formed first followed by removing a portion of the gate structure and removing the semiconductor region of one of the semiconductor devices to form the fin cut structure. In this way, the fin cut structure does not interfere when forming the gate structure.


