Post-Package Memory Repair Using Merged Redundant Rows
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Solution Overview
Problem
Current memory devices have limited capabilities for post-packaging repair due to a small number of redundant rows, which restricts the number of repair operations that can be performed without increasing space and power consumption.
Innovation Solution
Incorporating a larger number of redundant rows for both pre-packaging and post-packaging repair, utilizing non-volatile storage elements like fuses or anti-fuses, and a fuse logic circuit to manage and utilize these elements flexibly, allowing for increased repair operations without additional space or power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a larger number of redundant rows are incorporated for post-packaging repair, then the number of repair operations increases, but the space consumption increases
Solution Approach 1:
The patent combines pre-packaging repair and post-packaging repair functions into a single unified redundant row structure. The same redundant rows serve both repair phases, eliminating the need for separate redundant row allocations and reducing overall space consumption while maintaining comprehensive repair capability.
Solution Approach 2:
The redundant rows are designed to perform multiple functions: they can be used for pre-packaging repair of manufacturing defects and for post-packaging repair of defects that emerge after packaging. This multi-functionality allows a single set of redundant rows to handle all repair scenarios, maximizing repair operations without proportionally increasing space requirements.
2Reliability
If a larger number of redundant rows are incorporated for post-packaging repair, then the number of repair operations increases, but the power consumption increases
Solution Approach 1:
The control logic for pre-packaging and post-packaging repair is merged into a unified system that manages redundant rows. This consolidation reduces the overall control circuitry required, thereby reducing power consumption while maintaining the capability to perform multiple repair operations across both phases.
Solution Approach 2:
The redundant rows and their associated control mechanisms are designed to serve both pre-packaging and post-packaging repair functions. This universality means that the same hardware resources are reused across different repair phases rather than duplicating resources, thereby reducing total power consumption while enabling increased repair operations.
3Adaptability or versatility
If non-volatile storage elements like fuses or anti-fuses are utilized, then the flexibility of managing redundant rows improves, but the device complexity increases
Solution Approach 1:
The patent incorporates non-volatile storage elements (fuses or anti-fuses) during the initial manufacturing process to pre-configured redundant row assignments. This preliminary action allows the system to store repair information permanently without requiring complex runtime management logic, thereby achieving flexibility in managing redundant rows while minimizing the increase in device complexity.
Data Source
AI summary
Techniques are provided for storing a row address of a defective row of memory cells to a bank of non-volatile storage elements (e.g., fuses or anti-fuses). After a memory device has been packaged, one or more rows of memory cells may become defective. In order to repair (e.g., replace) the rows, a post-package repair (PPR) operation may occur to replace the defective row with a redundant row of the memory array. To replace the defective row with a redundant row, an address of the defective row may be stored (e.g., mapped) to an available bank of non-volatile storage elements that is associated with a redundant row. Based on the bank of non-volatile storage elements the address of the defective row, subsequent access operations may utilize the redundant row and not the defective row.