Post-Package Memory Repair via Background Scrubbing

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Modern DRAM memory systems face challenges in detecting and correcting soft and hard errors, with existing error correcting codes (ECC) struggling to identify soft errors in real-time and lacking strategies to address hard errors that develop over time, leading to potential program failures and data loss.

Innovation Solution

A post-package repair system incorporating a memory channel controller, scrubber, and error counter that performs background inspections and corrects errors using ECC bits, enabling efficient detection and correction of both soft and hard errors before they cause program failures or data loss.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If ECC bits are used to correct soft errors, then error correction capability is improved, but real-time detection during read/write accesses deteriorates

Engineering Contradiction:
Improveerror correction capabilityVSAvoidreal-time detection capability
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent implements background scrubbing operations that periodically inspect memory cells for errors before they affect normal operations. The scrubber proactively detects and corrects errors in the background, rather than waiting for read/write accesses to detect them, thus resolving the contradiction between ECC correction capability and real-time detection.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If memory is tested at factory for hard errors, then manufacturing reliability is improved, but post-manufacturing hard error detection deteriorates

Engineering Contradiction:
Improvemanufacturing reliabilityVSAvoidpost-manufacturing hard error detection
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent extends error detection and correction capabilities beyond factory testing by implementing continuous background scrubbing operations that actively monitor for hard errors throughout the memory's operational life. This preliminary ongoing inspection allows detection and correction of hard errors that develop after manufacturing, resolving the limitation of one-time factory testing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent transforms the one-time factory test into a continuous operational monitoring system. The background scrubber continuously inspects memory cells for hard errors throughout the system's operation, ensuring ongoing detection and correction capabilities that maintain reliability over the entire product lifecycle rather than just at manufacturing.

Inventive Principle:
Principle #20Continuity of useful action

3Reliability

If scrubber performs background inspection periodically, then soft error detection is improved, but detection frequency for developing hard errors deteriorates

Engineering Contradiction:
Improvesoft error detectionVSAvoiderror detection frequency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements dynamic scrubbing intervals that adapt based on detected error patterns. When soft errors or hard errors are detected, the scrubbing frequency increases to inspect more frequently, while during normal operation the interval remains periodic. This dynamic adjustment optimizes both soft error detection and hard error detection frequency, resolving the contradiction between periodic inspection benefits and detection frequency needs.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS10042700B2Integral post package repair
Publication Date: 2018.08.07 ADVANCED MICRO DEVICES INC
  • US10042700B2 patent drawing
  • US10042700B2 patent drawing
  • US10042700B2 patent drawing

AI summary

A post-package repair system includes a memory channel controller, a first error counter, a scrubber, and a data processor. The memory channel controller converts data access requests to corresponding memory accesses, and provides returned data to the host interface in response to responses received from a memory interface, wherein the responses comprise returned data and a plurality of error correcting code (ECC) bits. The first error counter counts errors in the returned data, and provides a control signal in response to reaching a predetermined state. The scrubber controls the memory channel controller to read data sequentially and periodically from a plurality of addresses of a memory system, and in response to detecting a correctable error, to rewrite corrected data. The data processor is responsive to the control signal to perform a post package repair operation with the memory system in response to the control signal.