Post-Package Semiconductor Fuse Access via Dielectric Opening
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Solution Overview
Problem
Semiconductor device fuses are prone to being blown during wafer level testing due to their placement before packaging, affecting the device's performance, necessitating a method to provide fusing after packaging.
Innovation Solution
A method and system for providing fusing after packaging, involving a semiconductor device with a substrate, a dielectric layer, a redistribution layer, and a solder stop layer, where openings are created in the fuse area to expose fuses for laser access, and protective layers are used to prevent damage during processing, allowing fusing to occur after electrical performance testing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of time
If fuses are placed in the semiconductor device before packaging, then fusing can be performed during wafer level testing, but the fuses are susceptible to being blown during testing which affects device performance
Solution Approach 1:
The patent applies preliminary action by preparing the fuse structure in advance during wafer fabrication, but delaying the actual fusing operation until after packaging. The fuse interconnect structure is built with protective layers and openings during wafer processing, but the fuse is not blown during wafer level testing. Instead, fusing is performed after packaging using a laser through the opening in the protective layer, thus preventing accidental blows during testing while maintaining the ability to perform fusing at the optimal time for device performance.
2Ease of operation
If fuses are exposed for laser access, then fusing can be performed after packaging, but the fuses may be damaged during processing
Solution Approach 1:
The patent applies local quality by creating a localized opening in the protective layer only at the fuse area where laser access is needed, while maintaining the protective layer intact over the rest of the device. This localized exposure allows the laser to access and blow the fuse without compromising the protective coverage of other sensitive structures during subsequent processing steps. The protective layer remains in place to shield surrounding areas from damage while permitting targeted fusing operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves electrical performance and yield by allowing fusing to be performed post-packaging, enabling single chip tracking without de-mounting the chip and optimizing performance without compromising the application.
Implementation Method 1
the at least one fuse is susceptible to being blown during wafer level testing by a laser
Data Source
AI summary
A method and a system for providing fusing after packaging of semiconductor devices are disclosed. In one embodiment, a semiconductor device is provided comprising a substrate comprising a fuse area, at least one fuse disposed in the fuse area, and at least one layer disposed over the substrate, wherein the at least one layer comprises at least one opening exposing the at least one fuse.