Post-passivation interconnect structure with dielectric isolation
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Solution Overview
Problem
Existing post-passivation interconnect (PPI) structures in semiconductor integrated circuits face limitations in flexible circuit routing, requiring additional layers to address signal integrity issues, which increases costs and reduces the process window.
Innovation Solution
The implementation of a PPI structure with a first upper connective layer featuring a supporting pad and a conductive channel, where a portion of the channel passes through the pad, and dielectric regions isolate them, enabling more flexible circuit routing and reducing the need for multiple layers.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If existing PPI structures are used with traditional routing methods, then manufacturing process is simpler, but circuit routing flexibility is insufficient and signal integrity issues arise
Solution Approach 1:
The patent segments the PPI structure into distinct functional layers: a first upper connective layer with conductive channels for signal routing, a second upper connective layer with landing pads for connections, and an upper intermediate layer with vias for vertical interconnections. This segmentation enables flexible circuit routing while maintaining manageable complexity through clear functional separation of each layer.
2Reliability
If more PPI layers are added to improve routing area and signal integrity, then signal integrity improves, but manufacturing cost increases and process window decreases
Solution Approach 1:
The patent designs each PPI layer to serve multiple functions: the first upper connective layer provides both signal routing and structural support, the second upper connective layer serves as both connection terminal and protective overlay, and the upper intermediate layer provides both mechanical support and electrical interconnection pathways. This multi-functionality reduces the total number of layers needed while maintaining signal integrity, thereby lowering manufacturing cost and expanding process window.
Data Source
AI summary
A method includes providing a die including a substrate and a bonding pad over the substrate, forming a connective layer over the die, and forming the landing pad over the connective layer. The forming the connective layer includes depositing a dielectric layer of a dielectric material over the die and patterning the dielectric layer. The patterning the dielectric layer includes forming a supporting pad area and forming a conductive channel area. A portion of the conductive channel area passes at least partially through the supporting pad area. At least one dielectric region interpose the portion of the conductive channel area and the supporting pad area. The forming the connective further includes filling the supporting pad area and the conductive channel area with a conductive material. The supporting pad area of the conductive material forms a supporting pad. The conductive channel area of the conductive material forms a conductive channel.


